TW200510738A - Universal test platform and test method for latch-up - Google Patents

Universal test platform and test method for latch-up

Info

Publication number
TW200510738A
TW200510738A TW092124134A TW92124134A TW200510738A TW 200510738 A TW200510738 A TW 200510738A TW 092124134 A TW092124134 A TW 092124134A TW 92124134 A TW92124134 A TW 92124134A TW 200510738 A TW200510738 A TW 200510738A
Authority
TW
Taiwan
Prior art keywords
chip
latch
test
testing
testing program
Prior art date
Application number
TW092124134A
Other languages
English (en)
Other versions
TWI225933B (en
Inventor
Jie-Hong Wang
Kai-Jen Ko
An-Ru Cheng
Original Assignee
Faraday Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Faraday Tech Corp filed Critical Faraday Tech Corp
Priority to TW092124134A priority Critical patent/TWI225933B/zh
Priority to US10/709,425 priority patent/US7089137B2/en
Application granted granted Critical
Publication of TWI225933B publication Critical patent/TWI225933B/zh
Publication of TW200510738A publication Critical patent/TW200510738A/zh

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2853Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
TW092124134A 2003-09-01 2003-09-01 Universal test platform and test method for latch-up TWI225933B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW092124134A TWI225933B (en) 2003-09-01 2003-09-01 Universal test platform and test method for latch-up
US10/709,425 US7089137B2 (en) 2003-09-01 2004-05-05 Universal test platform and test method for latch-up

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW092124134A TWI225933B (en) 2003-09-01 2003-09-01 Universal test platform and test method for latch-up

Publications (2)

Publication Number Publication Date
TWI225933B TWI225933B (en) 2005-01-01
TW200510738A true TW200510738A (en) 2005-03-16

Family

ID=34215175

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092124134A TWI225933B (en) 2003-09-01 2003-09-01 Universal test platform and test method for latch-up

Country Status (2)

Country Link
US (1) US7089137B2 (zh)
TW (1) TWI225933B (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106324477A (zh) * 2015-07-07 2017-01-11 旺宏电子股份有限公司 闩锁测试装置与方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102955124B (zh) * 2011-08-31 2015-04-22 北京中电华大电子设计有限责任公司 一种毛刺干扰触发芯片闩锁效应的测试方法
US9625520B2 (en) * 2015-07-06 2017-04-18 Macronix International Co., Ltd. Latch-up test device and method for testing wafer under test
CN106324395B (zh) * 2016-08-17 2019-09-13 上海斐讯数据通信技术有限公司 一种上电复位测试方法及系统

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH032679A (ja) * 1989-02-23 1991-01-09 Texas Instr Inc <Ti> テスト・データ・フォーマッター
US5623202A (en) * 1994-09-26 1997-04-22 United Microelectronics Corporation Testing multiple IC in parallel by a single IC tester
US6028438A (en) * 1997-10-31 2000-02-22 Credence Systems Corporation Current sense circuit
KR20000043490A (ko) * 1998-12-29 2000-07-15 윤종용 반도체 칩의 테스트 시스템 및 테스터
JP2000292490A (ja) * 1999-04-12 2000-10-20 Mitsubishi Electric Corp Lsiテスタ及びlsiのテスト方法
US6586921B1 (en) * 2000-05-12 2003-07-01 Logicvision, Inc. Method and circuit for testing DC parameters of circuit input and output nodes
US6940271B2 (en) * 2001-08-17 2005-09-06 Nptest, Inc. Pin electronics interface circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106324477A (zh) * 2015-07-07 2017-01-11 旺宏电子股份有限公司 闩锁测试装置与方法
CN106324477B (zh) * 2015-07-07 2019-03-12 旺宏电子股份有限公司 闩锁测试装置与方法

Also Published As

Publication number Publication date
US7089137B2 (en) 2006-08-08
TWI225933B (en) 2005-01-01
US20050049812A1 (en) 2005-03-03

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