TW200411926A - Structures and fabrication methods trench insulated gate bipolar transistors - Google Patents

Abstract

The purpose of the present invention is to provide structures and fabrication methods to protect trench insulated gate bipolar transistors against heavy-ion-induced destructive failures. The present invention uses the horizontal and vertical extension of the p+plug to reduce the lateral resistance of the P-base region and harden the trench insulated gate bipolar transistors against radiation without sacrificing the normal performance of the trench insulated gate bipolar transistors.

Description

200411926 V. Description of the Invention (1) [Technical Field of the Invention] The present invention is to provide a structure and a manufacturing method for anti-rotation damage of a bipolar transistor with a slot-shaped gate insulated gate, which uses a reduction of the slot-shaped gate insulated gate. 1. bipolar transistor

Transistor; TIGBT) to improve the radiation resistance of the device. In particular, the present invention can improve the anti-radiation ability of the component without affecting the normal operation of the component without changing the structure and method of the bipolar transistor of the gate-shaped gate insulator and without the need for complicated manufacturing steps. [Previous technology] In recent years, the efficiency of the insulated gate bipolar transistor has been rapidly improved, and it has become a switching element with a high operating voltage. (Metal Oxide Semiconductor; MOS) and the carrier blbl0iar structure are used together, especially in high-power applications. Such as: mobile phone communications and satellite communications. Insulated gate bipolar transistors are divided into planar gate insulated gate

Crystal, slot-shaped gate insulated gate bipolar transistor Wang y ^ L •• Temple. However, the slot-shaped gate-insulated gate bipolar transistor described in JL has superior research findings in terms of power source, U-I, and so on, compared with the traditional thousand-face gate-insulated gate bipolar transistor. Insulated gate bipolar transistors still have complex clumps g ^

Jing and s 7 are shortcomings. N-channel insulated gate bipolar transistor (τ I GBT) Αν, Qiru, ^ Ma examples, due to the internal parasitic gate fluid (thyristor) relationship will be Cao Lili_zi induction a break 200411926 V. Invention Explanation (2) Hearvy-ion-induced destructive failures, called single event latch-up (SEL), form a parasitic ρ _ η-p-n structure inside the IGBT, which will quickly Increase component current. This is due to the fact that there is no J F ET region in the design of the trough-gate insulated gate bipolar transistor, so it will have a lower on-resistance. If there is a latch-up (S E L) factor in the environment that induces a single event, such as the presence of a large amount of radiation environment, the latch-up phenomenon will be triggered inside the component. The above problems are currently encountered in the development of space applications. The parasitic gate fluid inside the insulated gate bipolar transistor is often triggered by the radiation effect in space, and then a positive feedback mechanism is generated. This positive feedback mechanism will Increase the component current quickly, and finally burn the component. As shown in Figure 2, Figure 2 shows the structure of a general N-channel insulated gate bipolar transistor. The grooved gate insulated gate bipolar transistor mainly includes N + emitter 26 (N + emitter) and an emitter. Metal 29, a drift region 22 (N-drift regi), -N + buffer layer 21 (N + layer), -P + substrate 20 (P + substrate), a p base 24 (p and a slot gate (Gate) 25. Its relevant position is shown in Figure 2. The structure of 心 heart is such that when there is heavy ion effect induction, its N-drift region 2 2, P base 2 3, and N + emitter 2 β band.士 = η = > When the environment is induced, such as heavy ion effect: two liters shot into wide: = structure 'When Arima 4 Kaneda shoots 4, it will easily trigger SEL 〇 Hungry image of bipolar transistor is proposed to protect 雔 雔 == 出The present invention proposes a method for improving the anti-H-radiation capability for the slot-shaped gate insulated bipolar transistor.

Page 6 V. Description of the invention (3) [Summary of the invention] The main purpose of the present invention is to provide the structure and manufacturing method of the sexual transistor, and its side resistance The working characteristics of yak low-groove gate insulation for 寺, ^, and 彳, and to improve the radiation resistance of components. 'To achieve the normal element compliance, another object of the present invention is to provide a transistor structure in the N-type channel insulation "" ^ : The area of the polar transistor P " lug, which further reduces the possibility of hair loss. 0 This can have a high radiation resistance secondary gate. The body is touched. Another object of the present invention is to provide a grooved gate 200411926 V. Description of the invention (4) The layer 'finished the step of emitter metaUization' to complete the production of the transistor. [Embodiment] The present invention uses the characteristics of reducing the resistance of the bidirectional thunder body of the slot-shaped gate insulated gate bipolar thunder body. Such as &, it will not be caused by the high in the environment; and; This can meet the normal working characteristics of the component and improve the radiation resistance of the component. Wherein, the lateral resistance value (as shown in the structure A in FIG. 1) refers to the hole current of the bipolar transistor with a gate-shaped insulating gate flowing through the P base region under the N + emitter. Finally, the resistance area formed by the emit ter electrode flows out. In order to explain the transistor structure of the present invention in detail, the present invention will provide an insulated gate bipolar transistor made of an N-type channel as an example and illustrated with reference to the figure. First, referring to FIG. 1, the grooved gate insulated gate bipolar transistor described in the embodiment of the present invention mainly includes an N + emitter 6 (N + emitter), an emitter metal 19, an p + substrate ι〇 (ρ + substrate), a p + plug 13 (P + plug), a p base 14 (P + base), and a slot gate 15 (gate). The process steps are as follows: A doping step is performed in the Shixi substrate to make the substrate a p + substrate, and then a diffusion or ion distribution method is used to form the substrate in the substrate! + + Buffer layer 11 (N + buffer layer) and N-drift region 12 (N-area), which is used to withstand high voltage. Next, P + Plugl3 is formed by using diffusion or ionization (Ion impiantati). The formation area of p + piugl3 is the focus of the present invention.

200411926

V. Description of the invention (5) p + piUgi3 under N + emitter 16 is doped with a low resistance by the diffusion method, so that a low-concentration large resistance formed by p basel4 under N + emitter 16 can be used. In this structure, the doping concentration of P + plugl3 is higher than that of P basel4. By doping with p + piUg13, the lateral resistance can be reduced, and the area of p + p 1 1 3 can be increased by extending laterally and vertically, as shown in structure A. This structure will have a smaller lateral resistance value, making it less likely that the parasitic gate fluid will be driven. The N + buffer layer 11 and the N-drift region 12 described above can also be formed (epi) using an epitaxial method. The distance of the horizontal axis on the right side of P + P 1 u S1 3 mentioned in the above description, without affecting the original operating characteristics of all parts and achieving the most effective principle of reducing lateral resistance I, can be made to the right Extend to make the radiation resistance more improved. To the depth of = P 1 ug, without affecting the original operating characteristics and j of the element, and effectively reducing the lateral resistance, the vertical extension can be made downward to increase the radiation resistance. The purpose of the formation of P + PlUgU is to change the low- and high-resistance area originally produced by P basel4 into a concentration = j resistance area formed by P + p 1 ug 丨 3, which can greatly reduce the side.向 Resistance. That is, the transient current source generated after the impact of the child Iί will reduce the inward resistance of the element, making the parasitic NρN transistor inside the element more broken, because the hole current of this transient current source passes through the emitter terminal. When it exits, the range it flows through is P + plugl3 with small resistance. This one = 卩 < effectively reduces the large resistance area originally formed by p basel 4. Once the resistance decreases, the N + emitter 16 and Small pressure formed by P + piUgl3

200411926

It will greatly reduce the fluidity of the parasitic gate. Such a shock) stimulates the body or has a positive effect. It greatly reduces the possibility that this heavy ion touch element is subject to the external and internal feedback mechanisms of both diodes. (For large currents of light, this bias voltage can be cited, because it is effective or affected by the The driving structure reduces the continuity of the radiation-resistant extra-heavy ions that hit the parasitic sluice to generate sluice fluid. As shown in Figure 1, P-weU is formed by ion implantation: the p_ba ^ e region. 14. Continue to use a dry oxidation method to form a gate oxide layer in the substrate (Ga7e oxide), using low-pressure chemical vapor deposition (Low called "chemical Vapor deposition; LPCVD) deposition of polycrystalline silicon material to produce. Slot-shaped gate electrode 15 (p ο 1 ygate), sputter or physical vaper deposition (PVD) deposition of metal aluminum silicon copper to form N + emitter 16 (emitter) and The oxide layer I? Above the Gafe is formed by dry oxidation. Finally, the emitter metallization step is used to form the emitter metal 19. The thus-produced transistor is as previously described. It can reduce the lateral resistance of the parasitic gate fluid emitter and base interface, so it will be stable in heavy ion environments such as satellite power supply systems or high-altitude aircraft. Gate Insulated Gate Bipolar Transistor Type 5 " Channel Slotted Gate Insulated Gate Bipolar Transistor or P-type Channel Slotted Gate Insulated Gate Bipolar Transistor. The embodiments of the present invention only describe N-type channel slots The manufacturing method of the bipolar transistor with the shape of gate.

200411926 V. Description of the invention (7) The grooved gate insulated gate bipolar transistor gate described in the embodiment of the present invention is not limited in its size, and its size may be sub-micron, deep sub-micron (Deep-sub-micron) or nano-meter. In the embodiment of the present invention, a series of experiments are compared with the slot-shaped gate insulated gate bipolar transistor (shown in FIG. 2) or a similar structure transistor (shown in FIG. 3) made in the conventional manner. The working voltage (as shown in Figure 4), the sensitivity of the SEL phenomenon after the impact of heavy ions (as shown in Figure 5) and the sensitivity of the SEL phenomenon after the impact at the same position of the transistor (as shown in Figure 6) ) And other conditions. First, the transistor structure involved in the experiment will be described. I. Structure A. As shown in FIG. 1, it is an embodiment of the present invention. Π · Structure B ········································ • ············································· The direction is shown in Figure 2. m · Structure c: As shown in Figure 3, it is in a trench-gate insulated bipolar transistor element in a similar manner to DMOS, but additionally forms a layer of P + diffusion region 33 (represented by structure C), However, the depth of this p + diffusion region is shallower than the structure A of FIG. 1. This structure includes an N + emitter 36 (N + emitter), an emitter metal 39 '— p + substrate 30 (P + substrate), a P + plug 33 (P + plug), and a p base 3 4 (P + base), a trench gate 35, a gate oxide layer 38, an upper oxide layer 37, an N + buffer layer 31, and an N-drift area 32. The formation of this structure is mainly due to the fact that after heavy ions strike the element, the hole current will not only flow vertically but also laterally, so this structure can reach

200411926

V. Description of the invention (8) The purpose of forming the Omega contact (Ohmir r +, ct in the polar transistor element) and reducing the lateral pressure drop inside the double slot trench gate insulated gate double gate. The results are as follows: · The collector current of the structure versus the prophet > ", From this curve (the fixed collector voltage is a curve, so the 荦 f structure of this frame, B, C have similar normal working electricity. # I 柞 if + 昌 射 The structure used (structure 0 and general "The same" does not affect its original operating characteristics. The voltage m uses the same structure (structures b, c), and uses the same position in the fixed collector i to use heavy ions (let = 0.4pc / #ffl) Hit the transistor n ... (1 to 14 m), observe the sensitivity of the structures B and C to the SEL · phenomenon. ^ 2 彳 In this figure, you can see that the structure c does not have the SEL · phenomenon, because = ^ pole current money As time goes by, it will eventually return to the leakage current value of the original balance sheet =, that is to say, under this structure, heavy ions do not pass through the slot-shaped gate insulated gate bipolar transistor to cause permanent damage. Where The component will return to the original state. Conversely, from this picture, it can be seen that a large current is generated in the structure b. This large current is the SEL current and will be burned = pieces. From this, it can be seen that the P + diffusion region proposed by the present invention But it has its own function. 0 Continuation, please refer to Figure 6, using heavy ions (LET =: 0.4pC / impact Structure A and Structure C are at the same position (X = 14 "η), where the same collector bias voltage (VO200V) is used, and then it can be seen that Structure c has triggered the SEL phenomenon, but Structure A does not trigger the SEL phenomenon. This is because the cross-sectional area of the p + well region of the structure a becomes larger, so the lateral resistance value can be reduced. In the case, it indicates that it can allow more current to flow to the structure α =

200411926 V. Description of the invention (9)-^^! ^ Double-carrier transistor that is sub- and does not drive parasitics. That is, when a part of the current flows through the p + well region below the N + emitter region, is the P + well region of the structure A better than that of the structure c? The + well area is large, so that the lateral resistance value of the structure a is smaller than that of the structure C, and finally the lateral pressure drop will also decrease. Finally, the structures A, B, and c are sorted out in a table. Whether the SEL phenomenon occurs under different bias voltages and different ion impact positions, to prove that the structure (structure A) used in this case can indeed effectively improve the groove. The bipolar transistor's radiation resistance ability is shown in Table 1, Table 2 and Table 3. Table 1 shows the measurement results of the structure A of the present invention with different collector bias and no SEL phenomenon at different locations. As can be seen from this table, when heavy ions (LET = 0.4 PC /// m) are struck at different positions of structure A under different collector biases, they only occur when the collector bias is greater than 24 (^ SEL phenomenon. To complete this table, two methods can be followed, the first is to first fix the position where the ions strike, and then use the collector voltage of structure A as a loop, sweeping from 260V to l70V, and then observe the collector The current vs. time curve, if the collector current has a large current phenomenon, it will be recorded as ¥ (that is, the occurrence of the SEL phenomenon). On the other hand, if the collector current returns to the equilibrium leakage current, then Record it as "No occurrence of SEL phenomenon", the second is to fix the collector voltage of structure A first, then change the impact position of ions after iron (x = 2 // m, 6 // m, 10 // m, 14 # m) 7 Then record whether there is SEL phenomenon according to the previous method. .. In Table 2, heavy ions (LET = 0.4 pC /// m) are struck at different positions of structure B under different 隼 biases. When the collector bias is greater than 80 volts,

200411926 V. Description of the Invention (ίο) SEL phenomenon occurred. To complete this table, you can follow two methods. The operation is the same as in Table 1. Only the voltage range is changed from sweep to 80 V. In Table 3, heavy ions (LET = 0.4 pC // zm) impinge on different positions of structure C under different collector biases. When the collector bias is greater than 170.V, the SEL phenomenon occurs. To complete this table, you can follow two methods. The operation is the same as in Table 1. Only the voltage range is changed from 220V to 170V, and then the collector current versus time is observed. Comparing the above tables (Table 1, Table 2 and Table 3), it is found that the structure A can indeed improve the trigger bias of the SEL phenomenon. In addition, from Tables 1, 2, and 3, it can also be found that the ions collide at a position closer to the channel, and the structure is more likely to have a SEL phenomenon. However, 'this SEL phenomenon does not occur in a place far from the channel. . Figure 7 shows the bounds of I and II. You and Y are the different ion impact positions of the ions impinging on the structures A, B, and C and the extreme bias voltage, and their sensitivity to the SEL phenomenon; the structure can be found. A operating situation is the most regulated. The voltage generated by the SEL is the highest. The reference examples described in the present invention are specific examples in a specific field, so those skilled in the art should be able to understand the proper and slight adjustments and applications of the present invention. It will still be cost-effective. Invented, in. The scope of subsequent patent applications is included in this publication. All such

200411926 Schematic description of the diagram [Simplified illustration of the diagram] Figure 1 is the implementation of the invention Figure 1 is the implementation of the invention Figure 2 is the implementation of the invention Figure 4 is the curve diagram of the collector current versus gate voltage of the implementation of the invention 5 It is the sensitivity degree of the phenomenon of biasing and impacting the structure B, ◦ according to the present invention. Figure 6 shows the sensitivity of the SEL phenomenon when the bias voltage is applied to the structure and the impact is applied to the structure a. Table 1 shows the different positions under the extreme bias of the present invention. Table 2 shows the different positions under the extreme bias of the present invention. Table 2 shows the different positions under the extreme bias of the present invention. The different positions under different drain bias voltages are implemented in the present invention. Vertical sectional view of structure A in the example. Vertical sectional view of structure B in the example. Vertical sectional view of structure C in the example. In the example, the structures A to C are three different structures.

In the example, the same heavy ion and the same position are used, and the structures B and C are paired with the SEL. In the example, the same heavy ion, the same and the same position with C are used, and in the structure A and C, the ions collide with the structure A in the example. Different sets of observations of their sensitivity to the SEL phenomenon. In the example, the ions impinge on different sets of structure B to observe their sensitivity to the SEL phenomenon. In the example, the ions impinge on different sets of structure C to observe their sensitivity to the S EL phenomenon. In the example, the ions impinge on the structures A, B, and C, and observe their sensitivity to the SEL phenomenon. Drawing number description: 10 P + substrate 11 N + buffer layer 12 N- drift region

Page 15 200411926 Simple description of the diagram 13 P + plug region 16 N + emitter 19 emitter metal 2 2 N-drift region 2 6 N + emitter 2 9 emitter metal 3 2 N-drift region 3 5 slot gate 3 8 gate oxide layer 14 P base electrode 1 7 upper oxide layer 2 0 P + substrate 2 4 P base electrode 2 7 upper oxide layer 3 0 P + substrate 33 P + plug area 3 6 N + emitter 3 9 emitter metal 1 5 slot gate 1 8 gate oxide layer 21 N + buffer layer 2 5 slot gate 28 gate oxide layer 31 N + buffer layer 3 4 P base 37 upper oxide layer

Page 16 200411926 Schema, but age (V) 270 260 250 240 230 220 210 200 m ISO 170 X (μιίϊ) \ 2-Ν Ν Ν Ν Ν Ν Ν N _M Ν 6-Ν Ν Ν Ν Ν Ν Ν N N Ν Ν 10 — Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν 14-Υ Υ Ν Ν Ν Ν Ν N Ν Ν Ν Table 1

^^ Itage (V) Χ (μώ) \ 190 18 »170 160 150 140 130 120 110 100 90 so 2-one Ν Ν Ν Ν Ν X Ν Ν N 6-one Ν Ν Ν Ν Ν Ν Ν Ν Ν Ν N N 10 一一 Υ Υ Υ Υ Υ Υ Υ Υ Ν N 14 11Υ1 Υ Υ Υ Υ Υ Υ Υ 表 Υ N Table " Wtage (V) XijiraK. 270 260 2550 24Π 2 ^ 0 22Λ 210 20Π 190 m Ι7Π 2 Ν Ν Ν Ν Ν Ν Ν 6 Ν Ν Ν Ν Ν Ν 10 Ν Ν Ν Ν Ν Ν Ν 14 Υ Υ Υ Υ Υ Ν table page

Claims (1)

200411926 6. Scope of patent application1. A method for manufacturing a trough-gate insulated bipolar transistor includes the steps of: (a) taking a semiconductor substrate to form a p + substrate after doping; b) forming a P + plug in the p + substrate using a diffusion method (diffusion); (c) forming a p + plug beside the p + plug using an ion distribution method (impiantati) P-well, where p-wen is the p-base region; (d) a gate oxide is formed next to the P-base region as a polysilicon gate A lower oxide layer; (e) fabricating the polysilicon gate on the gate oxide layer; (f) forming an N + emitter on the P-base region; (= on the An oxide layer of ± layer is formed above the polycrystalline gate; and the emitter metal emmer metallization is performed above the base region. 2 · :::: ί: Ϊ 2 Describing "1 pole insulated gate bipolar electricity P-base # # ^ ^ ^ makes the lateral resistance lower. The opening of the person P1 ug > becomes 3. As the scope of patent application The method for manufacturing a trough-shaped crystal as described in the above item, wherein the size of the area of the p + = ,,, and bipolar electrical g of the edge gate and the slot ZUU ^ li ^ ZO Therefore, the lateral resistance value generated by the fire egg transistor is relatively difficult to be driven ^ 4p + Plug area increases, its parasitic sluice ratio 4. Such as the method of making a patent application Fanyuan body 3, * 3 The slot-shaped gate insulation gate bipolar plug is to the right of the car. Larger p + Plug area method can increase the p + crystal sum to achieve the most effective; away from the 'extending without affecting the original operating characteristics of the element' makes anti-steering Under the principle of resistance, the lateral direction can be done to the right. 5. If the scope of the patent application is applied, the second force will be further increased. 9 deep voices in the plug area The P + Plug area method can increase the p + to the most effective minus two Does not affect the original operating characteristics and reach of the element 'makes the anti-radiation i :: resistance principle' can be extended downward vertically. If the scope of the patent application J is further increased. The gate-insulated gate bipolar transistor is a η-shaped channel, and the groove-shaped gate-insulated gate bipolar transistor can be used in the generation of the gate electrode. An electro-crystal method, wherein in step (a), the ρ + substrate system includes N + retarder + buf fer layer) and N-drift region 〇8. Method for manufacturing a slot-shaped gate insulated gate bipolar transistor, which is formed in step (b)? + Plugs can also be ion implanted (ion implantati, Hi, page 18 200411926 6. Scope of patent application 9. A trough gate insulated gate bipolar transistor (TIGBT) structure mainly includes: a P + substrate (P + substrate); a slot gate An N + emitter in the P + substrate is in the P + substrate and is connected to the slot gate; a P base is under the N + emitter and is connected to the slot gate. P + plug (P + plug) is connected to the N + emitter and P base; 10. Slot-shaped gate insulation gate bipolar = body structure as described in item 9 of the scope of patent application, the size of the P + Plug area is the same as the slot The lateral resistance value generated by the polar transistor between the gate-like insulation is inversely related; therefore, when the area of the P + plug increases, the review is driven. -Parasitic free fluid is not easy 11. If the scope of the patent application is for a crystal structure, the P + pi ug size can be selected to be extended to make 1 2. If the scope of the patent is for a crystal structure, the P + (diffusion) 1 3. If the patent is applied for Range crystal structure, the P + implantation) 14. According to the scope of patent application ^ " ππ valence gate insulated gate bipolar electric plug does not affect the original operating characteristics, ρ + square side extension teeth downward Do vertical extension = radiation resistance is more improved. The bipolar electricity of the slotted gate insulation gate described in item 9 is formed by the diffusion method and then formed by European electricity. The doping of the grooved gate electrode described in item 9 is the ion distribution method (lon Slot-shaped gate insulated gate bipolar electricity as described in 9 items The crystal structure of moxibustion is doped by implant ion. 15 · As in the ninth crystal structure of the patent application scope, the P + nl slot-shaped gate insulated gate bipolar galvanic -T pi ug doped The doping concentration in the ancient region can be reduced by the degree of the p-base resistance. The formation of x p1 Ug makes the side 1 6. As described in item 9 of the scope of the patent application, 舻 & Μ ^ & 岍 slotted gate insulated gate bipolar electric body "冓, the slotted gate system It is composed of the upper electrode and the lower oxide layer. 17. —Slot-shaped gate insulated gate bipolar transistor. The structure of the Mulat gate Bipolar Transistor (TIGBT) is mainly an N + substrate (N + substrate); and a slot gate is gated in the N + substrate with a P + emitter. (P + emitter) is connected to the N + substrate; an N base is under the P + emitter and is in phase with the slot gate; an N + plug is connected to the P + emitter and the n base Connected. 18. The grooved gate insulated bipolar transistor structure according to item 17 of the scope of the patent application, the size of the N + plug area is inversely proportional to the lateral resistance value generated by the grooved gate insulated bipolar transistor; Because of this, when the area of the N + plug increases, its parasitic brake fluid is relatively difficult to be driven. 1 9 · As stated in item i 7 of the scope of the patent application, the grooved gate insulated gate bipolar transistor structure, the N + p 1 ug, without affecting the original operating characteristics, N + Page 20 I ~~-200411926 VI. The scope of the patent application plug can be chosen to extend to the right side-to-side way, so that the anti-radiation ability can be vertically extended; Formation + _ is formed by diffusion. 21, as described in the scope of patent application No. 17 of the tenon, said 舻 舻 community furnace, Xi 疋 疋 闸 shape gate insulation gate bipolar electric sun body,.. Doped peach plug doping using implantation) 〇 22. As described in item 7 of the scope of the patent application, the α k monk gate insulated gate bipolar electric body is yttrium structure, and the N base is doped with implant ion. Equation 23: As described in item I of the scope of the application for patent, the company ’s embroidery is called # λΐ, a k-valent gate insulated gate bipolar electric solar structure, where the N + pUg is doped with F. : ,, Qu Ming, J / Chen is not in the P-base & domain, the difficulty is mixed, so the resistance can be reduced by the ^ direction. The formation of μ 1 u§ makes the secondary side 24. As described in item 17 of the scope of patent application, the strong side μ _ ^ „The monk-like leisure pole insulation gate bipolar electric solar heliostat I port structure, the slot-shaped question pole It is composed of the upper closed oxide pole and the lower oxide layer.