TR202102025A2 - Referans düzlemde işima sinirlayici i̇ç i̇çe geçmi̇ş tarak yapili (i̇nterdi̇ji̇tal) yarik ve/veya ayrik i̇çeren baski devre - Google Patents

Referans düzlemde işima sinirlayici i̇ç i̇çe geçmi̇ş tarak yapili (i̇nterdi̇ji̇tal) yarik ve/veya ayrik i̇çeren baski devre

Info

Publication number
TR202102025A2
TR202102025A2 TR2021/002025A TR202102025A TR202102025A2 TR 202102025 A2 TR202102025 A2 TR 202102025A2 TR 2021/002025 A TR2021/002025 A TR 2021/002025A TR 202102025 A TR202102025 A TR 202102025A TR 202102025 A2 TR202102025 A2 TR 202102025A2
Authority
TR
Turkey
Prior art keywords
reference plane
split
print circuit
slot
radiation limiting
Prior art date
Application number
TR2021/002025A
Other languages
English (en)
Inventor
Coşar Coşkun
Demi̇rel Ekrem
Üstüner Fati̇h
Ahmet Si̇s Seyi̇t
Yasi̇n Çi̇tkaya Ahmet
Original Assignee
Tuerkiye Bilimsel Ve Teknolojik Arastirma Kurumu Tuebitak
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tuerkiye Bilimsel Ve Teknolojik Arastirma Kurumu Tuebitak filed Critical Tuerkiye Bilimsel Ve Teknolojik Arastirma Kurumu Tuebitak
Priority to TR2021/002025A priority Critical patent/TR202102025A2/tr
Publication of TR202102025A2 publication Critical patent/TR202102025A2/tr
Priority to US17/670,399 priority patent/US20220264739A1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • H05K1/0227Split or nearly split shielding or ground planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231Capacitors or dielectric substances

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

Buluş özellikle baskı devrelerde referans düzlem üzerindeki yarıklardan ve ayrıklardan kaynaklı elektromanyetik ışıma seviyesini azaltmak ve işaret bütünlüğünü korumak üzere yarık ve/veya ayrıkların karşılıklı kenarlarından iletken parmaklar çıkarılması ve bu iletken parmakların birbirlerine temas etmeden aralarında mesafe konularak iç içe 10 gelecek şekilde örüntülenmesi şeklinde tasarlanan interdijital geometride yarık ve/veya ayrık yapısı içeren baskı devre ile ilgilidir.
TR2021/002025A 2021-02-12 2021-02-12 Referans düzlemde işima sinirlayici i̇ç i̇çe geçmi̇ş tarak yapili (i̇nterdi̇ji̇tal) yarik ve/veya ayrik i̇çeren baski devre TR202102025A2 (tr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TR2021/002025A TR202102025A2 (tr) 2021-02-12 2021-02-12 Referans düzlemde işima sinirlayici i̇ç i̇çe geçmi̇ş tarak yapili (i̇nterdi̇ji̇tal) yarik ve/veya ayrik i̇çeren baski devre
US17/670,399 US20220264739A1 (en) 2021-02-12 2022-02-11 Printed circuit board including interdigital slots and/or splits on reference planes for reducing emi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TR2021/002025A TR202102025A2 (tr) 2021-02-12 2021-02-12 Referans düzlemde işima sinirlayici i̇ç i̇çe geçmi̇ş tarak yapili (i̇nterdi̇ji̇tal) yarik ve/veya ayrik i̇çeren baski devre

Publications (1)

Publication Number Publication Date
TR202102025A2 true TR202102025A2 (tr) 2021-03-22

Family

ID=76373514

Family Applications (1)

Application Number Title Priority Date Filing Date
TR2021/002025A TR202102025A2 (tr) 2021-02-12 2021-02-12 Referans düzlemde işima sinirlayici i̇ç i̇çe geçmi̇ş tarak yapili (i̇nterdi̇ji̇tal) yarik ve/veya ayrik i̇çeren baski devre

Country Status (2)

Country Link
US (1) US20220264739A1 (tr)
TR (1) TR202102025A2 (tr)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6349038B1 (en) * 1999-09-21 2002-02-19 Dell Usa, L.P. EMC characteristics of a printed circuit board
US6624729B2 (en) * 2000-12-29 2003-09-23 Hewlett-Packard Development Company, L.P. Slotted ground plane for controlling the impedance of high speed signals on a printed circuit board
JP4794819B2 (ja) * 2003-04-02 2011-10-19 キヤノン株式会社 電子機器
AU2003239023A1 (en) * 2003-06-13 2005-01-04 Telefonaktiebolaget Lm Ericsson (Publ) Transmission line
TWI255159B (en) * 2004-11-03 2006-05-11 Tatung Co Ltd Low-noise multilayer printed-circuit board (PCB)
CN101048032A (zh) * 2006-03-29 2007-10-03 鸿富锦精密工业(深圳)有限公司 印刷电路板接地层
US10484231B2 (en) * 2017-06-30 2019-11-19 Intel Corporation Routing-over-void-T-line-compensation

Also Published As

Publication number Publication date
US20220264739A1 (en) 2022-08-18

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