TH6356B - Systems and components of a computer memory system using two-level fault correction and detection that can be fault-tolerant with the use of blocking effects. - Google Patents

Abstract

A system memory consists of a specific amount of memory, each of which has unit-level error correction capability and is associated with system-level error correction. Improving the reliability of a memory system can be achieved by setting the signal output of a specific memory unit to a constant value when an irreparable error occurs. such memory This method, which will force the creation of persistent errors that goes against this instinct, can improve the reliability of the entire memory system. The system can be improved because it allows the reversal/reversion process to be used. This will only work properly if the error can be replicated again. Therefore, the use of a chip-level error correction system, which is desirable as the circuit capacitance increases, can be achieved without disrupting the system-level fault correction method.

Claims (7)

1. A fault-tolerant computer memory system that receives position information and reacts to the information of the position by transmitting the information. The system contains: - A number of numeric memory. A number of unit-level factors for correcting and checking for errors. The factors are related to the aforementioned memory modules, and they perform corrections and checks for errors in data read from memory points within that memory and generate error signals. That cannot be solved, signal one There are a number of memory-level blocking factors that are related to the said memory, different units, and work by setting the signal out of their respective memory. A minimum of one bit is to be constant when such incorrigible error signals are received by factors for correcting and checking for errors at the unit level associated with them and factors for correcting and verifying. System-level errors that receive information from the said memory and can perform permanent fault correction based on the blocking factor. 2. The memory system according to claim 1, in the event that the above memory contains a semiconductor memory chip. 3. Memory system according to claim 1, in the event that such unit-level fault correction and checking factors will correct single error and double error checking. 4. The memory system according to claim No. 1, in the event that such a memory system still contains a mode switching factor, which can be used to control the on-off factor for blocking it 5. Fault-tolerant memory for the memory system, which accepts position information and reacts to the position's message by sending its message. This memory contains: - a number of memory points. Factor for correcting and detecting errors in data read from that memory point and generating unrecoverable error signals, one signal and blocking factor, which is activated by setting the signal out of the memory. Remember, at least one bit is constant when receiving an unrecoverable error signal from such correction and fault-checking factors. 6. Memory according to claim 5, in the event that such memory is installed on only one integrated circuit chip. 7. Memory according to claim 5, in case such correction and error checking factor will be corrected, single error and double error checking.