TH20261A - Extended Harvard architecture based memory system. - Google Patents

Abstract

An expanded Harvard architecture-based memory system that focuses on Address store for Contains a sorted sequence of addresses. Of the program memory And storage for packing A series of values of relative data Each address is contained in the Shared Address Store. With a specific set of instructions such as a subset The address store may also contain the address of one or more command arguments, which will then be addressed. Contain them in a separate repository or in the memory of separate data. Both the address store and the received value store. The connection is more desirable. Along with the same communication path Led To be used by the computer's data memory The store also includes a logical interface for doing Provide additional portions of addresses Together at more than one Have been programmed

Claims (9)

1. An extended memory system in a computer with a processor. Data memory Program memory One communication path between processors The central result and the memory of the said program And two separate communication routes Between the said processor and the memory of the said data Expanded memory system There are: factors in keeping one. For storing the location of the program's memory in order. Arranged Each memory location of that program is associated with a set of The specifics of the instructions contained in the memory of the other program; and Second collection factor For storing a series of values of related data in series, the second storage factor contains at least one memory unit and a logical factor. Of storage factors The second is said individually and alternately. Such a logical factor will make the position programmable. Each unit has an incremental value with different values. This is at least one incremental, an incremental two, an increment of four, and Has a value that increases to more than one integer. The logical factor also contains a register of A location consisting of at least one decoder for detecting low signal amplification. Where the processor retrieves from another program's memory, that position incremental signal determines the magnitude of the incremental position value. The program has such a factor in the collection of two such In the event of the first and second storage factors, each of them is connected to the signal cable. Of data, which is associated with two separate communication paths of the said data memory 2. Invention according to claim 1, in the event that the program's memory contains at least one set of instructions which It is a specific programmed method. Each set of instructions has one command. Order one It has one command position, and in case one of the storage factors contains at least one memory. At least one memory location for storing memory locations. Remember of such programs Each memory location of that program has a value that As the position of the first command 3. Invention according to claim No. 2, in the event that such memory of factors in Keeping that one has the position of the argument. Which is in memory of such information for At least one such programmed method. 4. Invention according to claim No. 2, in the event that such memory of factors in The aforementioned collection contains argument positions in the aforementioned second archive factor for the method. The program has at least one such method. 5. Invention according to claim No. 1 in the event that the memory of the said program It consists of both a simple and a non-volatile memory circuit. 6. Invention according to claim 1, in the event that such logical factors consist of A control register that contains a break circuit that allows the output position to be read. From the control registers thereof at that time on another signal line of such data 7. An extended memory system in a computer with a central processor. Program memory data The first communication path between the processors. Such medium and the memory of the said program. And two separate communication routes Between the said processor and the memory of the said data Expanded memory system Outward it contains: - The storage factor. For storing a series of relative data values, different sets are series, such storage factors are connected to the data signal lines, which are associated with two separate communication routes. It is the memory of such information. Where such storage factor contains at least one memory, and Logical factor The logical factor consists of a number of registers that can be positioned. Of these storage factors individually and alternately Such a logical factor will make a position that can The programmable part of the said memory and the unit is increased by a number of different values. At least such programmable position will have an increment of one. There is an incremental value of two, with a value that is an increment of four. And has a value that increases to more than one integer. The aforementioned logical factors also make up With a control register consisting of at least one decoder for detection The signal increases the value of the position that the processor has retrieved from the pro's memory. Another one such gram. The signal increases the value of such position determines the magnitude of the increased value of the The aforementioned programmable location of the storage factor. 8. Invention according to claim No. 7, in the event of a set of relative data values as They are part of the structure of the information. 9. Invention according to claim No. 7, in the event that such logical factors consist of A control register that can cause data values to be stored at a predetermined location. In the storage factor And the position of the collector factor at that time is increased by a large integer. More than one command was retrieved from the program's memory.