TH16109A - Double bus microcomputer system With programmable control of the locking function - Google Patents

Abstract

Dual bus microcomputer system with cache subsystem improves performance under certain conditions. By allowing programmable control to the LOCK function, in particular, a logical device is linked between the CPU's LOCK output path and the cache controller's LOCK input. The control bit from the I / O port is the second input to the logic device. When the control bit is at the first state, the logic device allows the LOCK inbound to follow the LOCK output.When the control bit is in the other state, the LOCK inbound is disabled regardless of the state of the LOCK outbound.

Claims (4)

1.Multi-cable type microcomputer system Which consists of The central processor and the secret memory subsystem Which is connected to the circuit with the local signal cable of the central processor The secret memory subsystem. Contains a control unit, a 82385 secret memory and a secret memory System cabling factor One of the 82385 secret memory control unit circuits to randomly run memory. And a number of operational units that can locate The processor has a LOCK channel and a secret memory control unit. The 82385 has a LOCK transponder and a logic factor with a control channel. The aforementioned logic factor per circuit lies between the aforementioned LOCK channels of the said processor. And the aforementioned LOCK transponder of the aforementioned 82385 secret memory control unit, such a logical factor responds to a predetermined signal on the aforementioned control channel. By sending a non-working signal to the aforementioned LOCK transponder of the aforementioned 82385 secret memory control unit to close the aforementioned LOCK transponder of the aforementioned 82385 secret memory control unit and will allow the transceiver. The LOCK of the said processor when there is no such predefined signal. 2. A multi-wire microcomputer system as described in Clause 1, in the event that the aforementioned logic factor consists of a logic device or 3.Multi-cable type microcomputer system Which consists of The central processor and the secret memory subsystem Which is connected to each other through the local signal cable of the central processor The secret memory subsystem consists of a control, a secret and a secret memory. System cabling factor One factor per the aforementioned secret memory control unit's circuit to randomly run memory. And a number of operational units that can locate The central processor has a LOCK channel, and the secret memory control has a LOCK transponder. There are also factors which will treat any work cycle. Associated with a LOCK transponder that is open as a cycle in which the secret memory cannot be used and the logic factor connected to the circuit is between the said LOCK channel of the processor. And the LOCK channel of the said secret memory control unit. Such a logical factor has a control input channel. And it responds to one signal on the control receiver by generating a LOCK in signal, which is the same as that of the LOCK output, or it will be a LOCK in that does not work for closing the LOCK receiver. Such a logical factor responds to such a high-state control receiver by muting the high-state of the receiver by muting the LOCK transponder to control the LOCK receiver. In the idle state regardless of the aforementioned LOCK channel. And responds to the control input in low state by forcing the LOCK transponder to follow that LOCK channel. 4. A multi-wire microcomputer system as described in Clause 3, in case the aforementioned logic factor consists of a logic device or