GB1279955A - Improvements in or relating to computer systems - Google Patents

Improvements in or relating to computer systems

Info

Publication number
GB1279955A
GB1279955A GB950471A GB950471A GB1279955A GB 1279955 A GB1279955 A GB 1279955A GB 950471 A GB950471 A GB 950471A GB 950471 A GB950471 A GB 950471A GB 1279955 A GB1279955 A GB 1279955A
Authority
GB
United Kingdom
Prior art keywords
store
peripheral
main processor
processor
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB950471A
Inventor
John Stephen Page
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to BE786342D priority Critical patent/BE786342A/en
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB950471A priority patent/GB1279955A/en
Priority to DE19722217609 priority patent/DE2217609A1/en
Publication of GB1279955A publication Critical patent/GB1279955A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Abstract

1279955 Data transfer STANDARD TELEPHONES & CABLES Ltd 15 April 1971 9504/71 Heading G4A A data processing system includes a main processor 1, a peripheral processor 2 having an associated store 3, and an access unit 4 for controlling data transfer between the main processor and the peripheral store, the access unit comprising a first set of gates 8 responsive to an address generated by the main processor, a switching device 9 operative in response to the detection of the address to allot the next access to the store to the main processor, a second set of gates 10 responsive to the output of the switching device 9 to transfer the address to the peripheral store, control means 13 and 14 which enable one of two further sets of gates 11 or 12 depending on the direction of data transfer between the main processor and the peripheral store, and an interlock arrangement 17, 18 for preventing the peripheral processor 2 from accessing its store 3 during periods when data transfer is occurring between the main processor and the peripheral store. More than one peripheral processor and associated store may be provided in which case an access unit is provided for each peripheral unit, interlocks being provided between the access units to prevent interference. Each peripheral processor may also be associated with additional devices 5 which are also denied access to the store 3 during data transfer between the main processor and the peripheral store. When an address is recognized by the access unit, bi-stable 9 is set, and the address pattern is passed through the gates 10 to the store 3. Data transfer from the selected part of the store 3 then occurs on the next access cycle in store 3 which is detected by gate 15, the direction being determined by the main processor. The flip-flop 9 is reset when the transfer is complete, as is the interlock bi-stable 18. The store 3 contains a number of register which are divided into three groups. The first group receive data from the main processor, the second group receive data from the peripheral processor for transfer to the main processor, and the third group are status registers. Each bit in the status registers corresponds to a register in the other two groups and is used by the peripheral processor to indicate whether it has data for the main processor or has received data from the main processor.
GB950471A 1971-04-15 1971-04-15 Improvements in or relating to computer systems Expired GB1279955A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
BE786342D BE786342A (en) 1971-04-15 IMPROVEMENTS TO SYSTEMS USING CALCULATORS
GB950471A GB1279955A (en) 1971-04-15 1971-04-15 Improvements in or relating to computer systems
DE19722217609 DE2217609A1 (en) 1971-04-15 1972-04-12 Access unit for data processing systems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB950471A GB1279955A (en) 1971-04-15 1971-04-15 Improvements in or relating to computer systems

Publications (1)

Publication Number Publication Date
GB1279955A true GB1279955A (en) 1972-06-28

Family

ID=9873246

Family Applications (1)

Application Number Title Priority Date Filing Date
GB950471A Expired GB1279955A (en) 1971-04-15 1971-04-15 Improvements in or relating to computer systems

Country Status (3)

Country Link
BE (1) BE786342A (en)
DE (1) DE2217609A1 (en)
GB (1) GB1279955A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2421421A1 (en) * 1978-03-29 1979-10-26 British Broadcasting Corp METHOD AND APPARATUS FOR PROCESSING DATA, MORE PARTICULARLY OF DIGITAL ACOUSTIC SIGNALS
FR2425113A1 (en) * 1978-05-03 1979-11-30 Numerik Karl Marx Veb Multiple coupler for active computers including one master - uses bidirectional programmable input-output gate circuits
US4212057A (en) * 1976-04-22 1980-07-08 General Electric Company Shared memory multi-microprocessor computer system
FR2449311A1 (en) * 1979-02-19 1980-09-12 Philips Nv DATA PROCESSING SYSTEM

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2641741C2 (en) * 1976-09-16 1986-01-16 Siemens AG, 1000 Berlin und 8000 München Computing system made up of several individual computers connected and interacting with one another via a manifold system and a control computer
JPS54129942A (en) * 1978-03-31 1979-10-08 Fujitsu Ltd Direct transfer system between sub-systems

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4212057A (en) * 1976-04-22 1980-07-08 General Electric Company Shared memory multi-microprocessor computer system
FR2421421A1 (en) * 1978-03-29 1979-10-26 British Broadcasting Corp METHOD AND APPARATUS FOR PROCESSING DATA, MORE PARTICULARLY OF DIGITAL ACOUSTIC SIGNALS
FR2425113A1 (en) * 1978-05-03 1979-11-30 Numerik Karl Marx Veb Multiple coupler for active computers including one master - uses bidirectional programmable input-output gate circuits
FR2449311A1 (en) * 1979-02-19 1980-09-12 Philips Nv DATA PROCESSING SYSTEM

Also Published As

Publication number Publication date
DE2217609A1 (en) 1972-12-07
BE786342A (en) 1973-01-17

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Legal Events

Date Code Title Description
PS Patent sealed
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee