SU999081A1 - System for transmitting and receiving monitoring signals - Google Patents

Description

(5) TRANSMISSION SYSTEM AND ACCEPTANCE OF CONTROL SIGNALS

one

The invention relates to automation and computing technology and can be used for organizing a scientific research institute for in-plant dispatching in order to ensure timely and in-depth information to the dispatcher and guide the workshop during the production processes in the workshop sections.

A device for monitoring and recording the planned and actual production of products is known, which includes a sensor for the actual production of products, a counter, a pulse generator, a sum tor, a predetermined generator, a pulse shaper, logic blocks, and delay elements 0

The disadvantage of this device is narrow functionality, since it can be used to control and record the planned and actual production of products only from an object producing products of the same size.

for example from the machine. In addition, in this device, a plan is formed by counters with a variable counting coefficient, which reduces the reliability of the device.

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The closest to the technical essence of the present invention is a system for transmitting reception of control signals, containing a unit at 10. ema - transmissions, the first outputs of which are connected to the inputs of the first board, and the second outputs are connected to the first inputs of the polling unit, the first

The j outputs of which are connected to the first inputs of the receiving units — in front of them, the second outputs of the interrogation unit are connected to the first inputs of the output unit for printing, the output of which is connected to the printing unit, and the controller 2.

A disadvantage of the known system is its limited functionality, since it does not allow to evaluate the rhythm of the production operation. The aim of the invention is to enhance the functionality. The goal is achieved by the fact that in the system of transmission and control signals, containing the reception and transmission units, the first outputs of which are connected to the inputs of the first scoreboard, and the second outputs are connected to the first inputs of the polling unit, the first outputs of which are connected to the first inputs of the reception-transmission blocks, the second outputs of the polling unit are connected to the first inputs of the print unit, the output of which is connected to the printing machine, the dispatcher's console, the first and second storage devices, the control unit, the computing unit, and the distance the second and third scoreboards, the first input and the first output of the controller are connected respectively to the first output and the first input of the control unit, the second output of the control unit is connected to the second input of the polling unit, the third output of the control unit is connected to the second inputs of the control unit receiving and transmitting via descramblers - with the first inputs of the second and third scoreboard, the fourth output of the control unit is connected to the first inputs of the calculating unit through the second memory device, the second output is and the dispatcher is connected to the third input of the polling unit, the third output of the dispatcher's console is connected to the second inputs of the computing unit, the third outputs of the polling unit are connected to the third inputs of the computing unit, the first outputs of which are connected to the second inputs of the print output unit, the second outputs of the computing unit are connected to the second ones the inputs of the second board, the second outputs of the polling unit are connected to the corresponding third inputs of the second and third boards. The control unit contains a generator of clock pulses, the output of which is connected to the first input The control pulse shaper, the first output of which is connected to the first input of the key block, and the second output is connected to the first input of the write distributor, the first output of the write distributor is connected to the second input of the key block, the second output of the write distributor is connected to the input of the code generator address and through the memory address counter is connected to the first output of the control unit, the third output of the recording distributor is connected to the first output of the information code converter, the first outputs of the key block and the first output of the pre The information code generator is connected to the corresponding third inputs of the control unit, the second outputs of the key block and the first output of the address code generator are connected to the corresponding fourth outputs of the control unit, the second output of the address code generator is connected to the second output of the control unit. The polling unit is made on the first and second pulse distributors and on the chronizer, the first outputs of the polling unit are connected to the first inputs of the first and second pulse distributors and the chronizer, the second inputs of which are connected to the first outputs of the polling unit, the outputs of the first and second valves are connected respectively to the second and second with the third outputs of the polling unit, the second input of which is connected to the second input of the chronizer, the third input of the polling unit is connected to the third inputs of the first and second pulse distributors. The computing unit contains a buffer register, a multiplexer, strings, a data code converter, a write pulse shaper, a time sensor, a data code converter, a time interval converter, a time code converter, a pulse distributor, a data multiplexer, information input keys, an arithmetic unit, and an indication control signal generator, the first input of the computing unit is connected to the first input of the buffer register, the output of which is connected to the input of the row multiplexer, the output of the row multiplexer connected to the first input of the data code converter, the output of which is connected to the first input of the data multiplexer; time sensor output is connected to the first input of the time code converter, the output of which is connected to the second input of the data multiplexer; the first output of the distributor is connected to the first input of the time interval converter and to the second ones the inputs of the multiplexer line, data code converter, and time code converter, the output of the time interval converter 599 is connected to the third input of the multiplex data output, the output of which is via serially connected information input keys. And the arithmetic unit is connected to the first input of the indication control signal generator, whose outputs are connected respectively to the first and second outputs of the calculation unit, the second input of the calculation unit is connected to the distributor input, the second output of which is connected to the fourth input of the data multiplexer; the third output of the distributor is connected to the second input of the indication control signal generator. FIG. 1 shows a general scheme of an automated dispatch control system; in fig. 2 is a diagram of a control unit and memory devices; in fig. 3 diagram of the polling unit; FIG. 5 is a diagram of the calculations5; FIG. 5 is a diagram of a block of reception - transmission. The automated dispatching control system (Fig. 1) contains the dispatcher console 1, blocks 2-2 p (transmissions, interrogation unit 3, memory device, computation unit 5, print control unit 6, printing machine 7, decoder 8, the scoreboard 9 and 10 performed on the cipher board 11, the fact board 12 and the plan board 13, the memory device k (RAM) k contains the cipher RAM 1A, the plan RAM 15 and the control unit 16, the reception unit 2 contains the information input panel 17 and the receiver 18, the display of the cause indication is simple. The cipher RAM T, the plan RAM 15 and the control block 16 These contain (Fig. 2) 2 {L-2G. RAMs, buffer register 21, block 22 record, buffer register 23 plan, block 2k record, information code converter 25, control pulse generator 26, clock generator 27 , key block 28, record distributor 29, address code generator 30, memory address counter 31. Poll unit 3 (FIG. 3) contains a control unit 32 running on code line generator 3 and pulse distributor 35, SZZZ distributors are executed on multiplexers data 36-36, information multiplexers 37-37, n the keys 38-38 control lamps and decoders 39-39. Block 5 of exposures (Fig.) Contains a driver (About write pulses, buffer register, t2 row multiplexer, data code converter AZ, time code converter k, time interval converter S, pulse distributor tS, multiplexer "7 data, keys" 8 input data, calculator, shaper 50 of indication control signals and time sensor 51, Transmission receiving unit 2 contains (FIG. 5) fact signal shaper 52, information input indicator 53, cipher signal shaper 5, input node 55 just simply, receiver 56 inform Fact Factors, Fact RAM 57, 58 lines multiplexer, cipher code receiver 59, and record control node 60. The system works as follows: Before starting the shift, the dispatcher enters the initial information about the ciphers of the manufactured product and its scheduled task for the shift, using the remote control 1. Using the remote control 1, the dispatcher enters digital information into the system memory, i.e., the digits in which the code of the controlled product is coded and the code for the quantity of this product. The display of information on the scoreboard 9 and Yu about .. comes independently, therefore it is possible the simultaneous control of any two Tiz group) sections of the shop. To facilitate the use of system memory, the entire memory array is divided into lines, with a total of Q lines. Each line of memory can store a nine-digit decimal number, i.e. five cipher bits and four plan bits. Five lines make up the plot. Thus, the input of information and its reading is carried out line by line. After this information is entered into the system by a command from the console 1, the system is switched to the mode of automatic reception and processing of information. Information on the actual quantity of the produced products and its cipher is transmitted from the console by 17 site masters. This information is transmitted to the receiver 18 through the communication lines, where it is processed and summarized. The output of the received information for viewing by the dispatcher is carried out through polling unit 3, which is operated by the dispatcher's command. made a selection of the workshop area of interest to the workshop, and the dispatcher can simultaneously view any two (from the group) sections of the workshop, which provides more effective control over the course of production processes. In addition, the received information through block 3 simultaneously enters block 5, in which the plan is calculated at the current time. Thus, on the scoreboard 9 and 10, the dispatcher simultaneously observes information about the cipher, and by its five types (product range of the site). From block 3, the received information on the dispatcher's call (or automatically after a predetermined period of time) can flow through block 6 to the printing machine 7, from which the corresponding document is removed. The operation of each of the nodes in the dispatching system according to the block diagrams shown in Figs 2-5 is described below. The cipher RAM and the output plan (Fig. 2) are intended for managing the system's memory, entering information into it, correcting and correcting input errors. The code converter 25 is used to receive information from the dispatcher's console and convert it into a binary code for recording in the memory of block 20. At the same time, an input signal is generated, which serves to start block 2b. nine cells of memory (five cells form the operational memory of the cipher, four - the operational memory of the plan). Each cell can hold forty one-digit numbers. The input of block 20 receives the following signals; the binary code of the number from block 23, the address signal from the control counter 31 of the memory address and the control signals from the block 26 of the control pulse generator; From the output of block 20, the binary code of the number written into it is read. The binary code is fed to the buffer register. Moreover, five blocks 20 operate on the buffer register of the cipher 21, they give out the binary-decimal code of the cipher, and the other four memory blocks give the binary-decimal register 23 of the binary-decimal. plan code. Unit 2b is a service for receiving a sequence of signals that carry out either the recording of information during input or its reading during output. Block 29 serves to supply write pulses to a specific memory cell when recording (input) information. The address code generator is designed to receive the address code of memory cells 11 and 20, made in the form of an asynchronous binary counter with a conversion factor of forty. The binary code of the address is removed from the outputs of this counter. The address control counter 31 operates synchronously with block 30 and serves to monitor the memory address of the system. The code removed from it is decrypted and fed to the indicators installed on the controller 1 controller. Block 31 consists of two parts: the first part with a conversion factor of 8 serves to indicate the area, and the second part with a conversion factor of 5. serves to indicate the line in the area. This makes it easier to find the desired memory area when working with it. The buffer register 21 of the cipher is designed to store the readable information for the duration of the cycle and contains a register on the triggers. The register allows you to write and store in it in a binary-decimal code a five-digit decimal number. Information removed from block 21 is fed through a decoder 8 on the scoreboard of cipher 10 (10y and simultaneously to the receiver 18 of the information receiving and transmitting unit 2. Interrogation unit 3 (FIG. 3) is designed to control the output of information stored in the system memory (in blocks 20) on the indicator boards, and it provides the output of information 1 on any of the eight sections of the workshop to two boards 9 and 10 independently of each other. 32 control rooms The pulses are used to switch information from the multiplexers of the line rows, t, e, serves to select the section from which information is to be displayed on information board 9 and 10. Since there are two information distributors, they allow you to independently select any two sections from the group of sections workshops and display information from them on two boards.The control of pulse distributors occurs on a signal from the controller 1 of the controller. The ZGZE unit serves to convert a binary code to decimal and through a diode one. matrix (not shown) in the seven-segment code for indicators installed on information boards. In this case, the fact decoders 39 and 39 operate from information multiplexers 37 and 37. The pulse distributor 35 serves to generate a sequence of pulses from which the grid control signals ing are formed, and 1 Ω of the IV- located in the display) and 1l (1f7

Block 35 generates a sequence of forty pulses (according to the number of lines in the memory). Each section is provided with five pulses (according to the number of lines in the memory of the section). The block 35 is controlled by a signal from the generator 3 of the line code. Generator 3 is a binary counter with a conversion factor: equal to 0. Multiplexers 36 and 3B of indications are designed to extract from the sequence 0 of the pulses fed to them only those five pulses that correspond to the selected section for indication. The ST units and (36) are controlled by the binary code of the site, which is fed to the information multiplexers 37 and simultaneously to the indication control multiplexers 1 from the controller 1. In this way temporal isolation is provided by lines and by. plots when displaying information, since a dynamic method is used to display information, the use of which allows for low hardware costs for the device. From the output of the multiplexers 36 and 36, control pulses are applied to the keys 38-38 of the control of the cipher and fact indicator grids. The blocks 38 and 38 are similar to each other of these blocks necessary for. the formation of pulses of large amplitude and corresponding polarity in order to provide the necessary power supply for the IV-4 indicators. The keys are made on bipolar high-voltage transistors and their outputs are connected to grids of indicators. Calculation block 5 (FIG. 4) is designed to process information associated with the schedule and rhythm.

rum. Information related to the rhythm of the execution of the plan is set once in accordance with the conditions of the workshop in a special device of converter 20 of the time interval code. The time elapsed since the beginning of the shift is taken into account by the sensor 31-time (block 51). from which is read in the same units in which the code is specified

Claims (2)

1. USSR author's certificate number 690512, cl. G 07 C 3/10. 2. Loskutov V.I., Control Mathematical Machines, M, 1967, 430 (prototype) 9 0U2.f Fig / iFi15