SU550666A1 - Device for collecting transmission and reception of information - Google Patents

Description

dispatcher station information storage blocks, the first inputs of which are connected to the outputs of the respective information sensors, one output of the clock generator is connected to the second inputs of the information storage blocks, the correction outputs of the control and correction unit are connected to the third inputs of the information storage blocks, outputs "setting the rhythm of the control and correction block are connected through the appropriate master of the plan to the fourth inputs of the information accumulation units, the fifth and secondary inputs of which are connected to the first The interrogative outputs of the cyclic switch, the outputs of the information accumulation units are connected to the information inputs of the information output unit, the trigger output of the control and correction unit is connected to the corresponding input of the cyclic switch, the second interrogation outputs of which are connected to the inputs of the information output unit, - the information outputs of which are connected to informational the inputs of the comparator unit, the phase-pulse and number-pulse outputs of the clock generator are connected to the corresponding inputs of the block control and correction, and the clock output to the clock input of the cyclic switch, the clock output of which is connected to the inputs of the secondary information of the display points through the serial code transmitter and parallel communication channels, each of which contains a serial to parallel converter, the first output of which the decoder of the number of the information accumulation unit, the second output - through the decoder of the accumulator number, the third output - through the decoder of the discharge number of the accumulator are connected to the co the corresponding inputs of the switch of the accumulation unit selection and the accumulator, one outputs of which are connected to the first inputs of the AND elements, the control output to the corresponding input of the serial to parallel converter, the information output of which is connected to the second inputs of the AND elements, and outputs of the AND elements information inputs of the storage unit, the control input of which is connected to the corresponding output of the serial-to-parallel code converter, and the outputs via the decoder cheny to the display unit.

This known device is characterized by the fact that, in the comparison unit, the allowable lag threshold is manually set by a natural number, which causes inconvenience in using the device, since changing the "plan at monitored points" requires a corresponding change in the lag threshold at each controlled point; no lag signals are displayed on display points; the lag threshold has only one level, whereas rank managers need to signal an appropriate lag level; each receiver of secondary information on display points

it is connected to the control room by individual multi-wired communication lines, the number of which must be proportional to the number of controlled points, the number of drives and their size; the correction of the drives is made by applying to their

the counting inputs of a predetermined number of pulses, the counting of which is produced by an additional counter, and the correction takes considerable time, especially with a large number of countable bits and a large number of drives.

The aim of the invention is to simplify the communication channels between the control room and information display points; reducing the number of active drives and their

simplification by executing accumulators, a change based on phase-impulse counters, and accumulators, a day, a day-total and a month, in the form of passive decimal switches, automating the process of determining backlog levels of an output from a plan by calculating the difference between the group the plan and the “release to the“ plan with discretization of the lag level into three zones with a 10% increment, the corresponding three levels of management, “the site manager — the shop manager — the enterprise manager; deformations of requested at the point of display, and increase

its fidelity, i.e., simplifying the device for collecting, transmitting and receiving information and increasing its efficiency.

In the proposed device, this is achieved by entering it into the control room.

a point number converter, a rounding block, an arithmetic unit, an address encoder and a one-time transfer unit; the first control outputs of the cyclic switch are connected to the corresponding inputs

number converters, the second - with the inputs of the comparison unit, the third - with the inputs of the arithmetic unit, two information inputs of the number converters are connected to other information outputs of the output unit

information, the third input of the number converter - to the output of the arithmetic unit, the fourth input - to the output of the clock generator, the output of the number converter is connected to the second input of the serial code transmitter.

The first interrogation outputs of the cyclic switch are also connected to the inputs of the address coder, its two phasing outputs are connected to the corresponding inputs of the address coder to which the cycling switches cycling switches are also connected, the first of which is combined with the first input of the one-time transfer unit, the output of the address coder is connected to the third

input to the transmitter serial code. the output of which is connected to the second input of the one-time transfer unit, the third input of which is connected to the second triggering output of the control and correction unit, and the output to the input of the secondary information receiver of the control room, the inputs of the numbering unit are combined with the inputs of the comparison unit, its output is connected to one input an arithmetic unit, the other input of which is connected to the output of the control unit, a lag zone switch and a lag signaling unit are inserted into each receiver of secondary information, with the output from Avan transducer serial to parallel through zones lag switch is connected to the first input signal lag unit, a second input-connected to the output of the decoder information storage block numbers. FIG. I shows the block diagram of the proposed device; in fig. 2 - clock generator; in fig. 3 - information accumulation unit; in fig. 4 - information output unit; in fig. 5-block control and correction; in fig. 6 - secondary information receiver. The proposed device contains a central console 1 at the control room, including accumulation blocks 2i - 2, plan control setors 3i - 3 „, generator 4 clock pulses, cyclic switch 5, information output block 6, 7 number converter, serial code transmitter 8, address encoder 9 , block 10 of one-time transmission of the cycle, block And comparison, block 12 of rounding numbers, arithmetic block 13, block 14 of control and correction; at controlled points, the device contains sensors 15 - 15 „information; at the distribution center and at the display points of the PIR are receivers 16 and 17i-17 of secondary information. Block 2; accumulation calculates the number of pulses of the planned rhythm coming from the corresponding setting device 3, - “a plan that converts a number equal to a shift task for the release of products of one type at the corresponding controlled point to the number of pulses uniformly distributed during the shift, and also counts the number of actual pulses rhythm coming from the corresponding sensor 15 / information. In addition, each block 2; The tips contain drives “change,“ day, “sutkn-ptog and“ months, accumulating data for the corresponding time intervals separately, “plan and“ fact. Cyclic switch 5 performs continuous bit-wise cyclical polling of the drives of 2-2n blocks, and also controls the operation of information output block 6, 7 number converter, block 11 of comparison of transmitter 8 of sequential code, arithmetic block 13. At the same time, outputs 18i - 18 ,. polling is controlled by the corresponding accumulation blocks 2i - 2 „, but on outputs 19–22 of the accumulators within the corresponding accumulation block 2–2„. A random interrogation of the drives of the output unit by outputs 23i-23 and the rest of the blocks are controlled by outputs 24-32. On output 33 - to the input of the converter 7 numbers - the combined signals of all the bits of the drives "change all blocks 2i - 2" accumulations are fed, and on the output 34 - the combined signals of the bits of the remaining drives. The signals of the individual bits of the accumulators 2 “change (“ plan + ”fact)” arrive at the outputs 35i -35 2 at the inputs of the comparison block 11 and in parallel - the block 12 rounding numbers. Cyclic switch 5 is activated by software input to input 36 from control and correction unit 14, and cyclic switch 5 is switched by clock pulses from clock generator 4 at input 37. Pulse generator 4 with different frequencies needed for operation: blocks devices. Oii contains a master oscillator 38, a binary number generator of 39 numbers, a reference divider 40, frequency dividers 41 and 42, binary fractional dividers 43, 44 and 45, and shapers 46, 47 and 48 of the pulse series. At output 49, a main clock frequency sequence operates, and output 50 is a reference sequence, input 51 is operated by a sequence that controls the binary-decimal dividers 43, 44 and 45, at ten outputs 52o - 529 - / sequences with the same frequency , but with the phases shifted one relative to the neighboring one — at one cycle of the clock frequency, at the outputs 53i there are 534 i-pulses corresponding to these phases (numbers), but in the binary-tenth code, at the outputs 54 to 549; 55i-559, 56i-5b9- series of pulses that control the operation of setters 3i - 3 „nlan. Each block 2; accumulation contains drives 57i - “plan-change and 572 -“ fact-change, 58 - “nlan-day and 58 -“ fact day, 59 ““ plan-day-result and 599 - “fact-day-result, 60 - "Plan-month c p 602 -" fact-month c. The “change” accumulators contain - to, accumulators “a day and a twenty-fourth day — I, accumulators of a month — t ten-th bits. At the same time, the “change” drives are made in the form of “counters with phase-pulse” representation of information, and the drives “day,” 24 hours result and “month” in the form of passive memory elements on digital dialing decimal switches. The output contacts of the same name of all these switches are paralleled, and they are connected to outputs 52o-529, on which pulses with phases corresponding to the O-9 numbers operate. Depending on the situation

general contact of the switch; at the output of the discharge of the accumulators, pulses with a phase corresponding to the number dialed in this discharge act.

Information output from the drives 57i, 572, 58, 582, 59i, 592, 60i, and 602 is performed on the single-wire corresponding Outputs 61i - 61, 62 - 62, 63 - 63; , 64i - 64; , 65i - 65,, 66 - 66; , 67 - 67 „, 68 - 68m, which are connected to the corresponding inputs of the information output unit 6.

The information output unit 6 contains input elements “OR 69 - 69 g / g, 70 - 70 2; , 71i - 71.2; , 72 - 72. „g, elements“ And 73 - 730, 74i - 742; , 75 - 75., 76 - 76 2t: And the output elements “OR 77 and 78.

The input elements “OR combine the outputs of like-bits of like drives of all blocks of 2–2” accumulations, element 77 combines the outputs of all bits of the drives “change, and element 78 - outputs of all bits of drives“ 24 hours, 24 hours total and “month c. The combined output 33 of drives "change and the combined output 34 of other types of drives are connected to the converter 7 numbers, and the bits" plan and "fact of drives 2" change are connected to the AND comparison unit and the 12 rounding block on the outputs h ,.

The converter of 7 numbers converts the Numbers of the Phase of pulse form to the binary-decimal, and at the same time when polling the drives “day and month”, the summing of the contents of these drives with the contents of the drive “change of the same block 2, - accumulation. The serial code transmitter 8 transmits the drive bits arriving at its inputs on command from the cyclic switch with a sequential old-fashioned code to display points — on one HOiCTOpOHHeMy link (without a reverse channel). For example, a two-wire physical circuit is transmitted continuously in accordance with a continuous polling performed by cyclic switch 5.

This mode of operation is due to the fact that a large number of display points are required to transmit and to display a large amount of information at the receiving point. In the recommended application area at the same time, there is no need to display the entire amount of information, it is enough to ensure that the item of display of information relevant to the interest is at the present time, the Controlled item and which characterizes the planned AND actual rhythm in relation to a specific period of time — shift, day or month At the same time, a request for displaying this or that type of information at any point may arise at independent random points in time. These requirements are satisfied by continuous cyclical polling of data storage devices and the transfer of their contents with a cycle repetition rate determined by the type of channel, transmission rate and volume

diopetcher's drives. Information, in addition, is divided into blocks and subunits, in accordance with accumulation blocks and accumulators (within the accumulation block, and for separating blocks and subunits

The information is marked with signs, for example numbers. One cycle of operation of cyclic switch 5 consists in a single poll of each bit of all accumulation blocks, after which the cycles are repeated.

Each polling cycle and at the same time the transmission begins with the transfer of the "start of the cycle code" and ends with the transfer of the "end of the cycle code. They are phased receiver secondary information.

The transmission of each information block and subblock is preceded by the transmission of an address combination of a code that carries information about the number of the corresponding block 2; a snare or accumulator in it. Address Combinations

are formed by the address encoder 9, they also form 1c and phasing combinations. To reduce the time to enter the secondary information receiver into the secondary information receiver phase, the start-of-cycle phasing combination is transmitted

in each information block. Service bits are added to each generated code pattern, for example, a control bit for even-ness, and accompanied by start and stop elements, they are transmitted

serial binary uniform code to the communication channel.

Through the block 10 o1DN1OK | Pratnogo transmission of the cycle to the output of the transmitter 8 of the serial code connects the receiver 16 of the secondary

dispatch information. This is related to the fact that it was indicated above that the drives “day,” day-total and “month” are a set of passive decimal switches and are MI conditional-time blocks in which information changes once In the shift before the start, in this case, in each drive for 24 hours and a month, the operator manually sets a number equal to the sum of the numbers previously contained in this drive and the number contained in the drive for change at the time of installation. In the meantime, this amount is automatically calculated during the output and transmission process, is stored on the screen.

the light panel of the receiver 16 of the secondary information of the DISPETCHER point in case of selecting a subunit of information corresponding to this drive “day or month”, i.e. actually already calculated and recorded, it remains only to install it with ten switches from the same drive. However, since the calculation of the sum occurs in each new cycle and any change in the STATE of the selected accumulator leads to a change in the sum, the receiver 16 is transmitted through block 10 and the loop is transmitted once, after which its input is closed and the number to be set in the light bar is displayed. storage device and which represents the final product release at the corresponding controlled point (planned or actual) for a given period of time (day, month) at the beginning of a new shift. Switching the one-time cycle transfer unit 10 to the specified mode is performed by the Command from the control and correction unit 14, and the digital counting is calculated after switching the signal to the "end of the cycle coming from the cyclic switch 5 on output 31.

Comparison unit 11 compares the numbers contained in the accumulator and the fact-shift accumulators, which are currently outputting one or another block 2, accumulation, and in the case when the number "plan is greater than the number" fact, gives signals to the arithmetic unit 13 "and the calculation of the value of the" fact "from the" plan. The comparison is performed in bits, starting with the most significant bits, while the outputs 19 of the cyclic switch 5 poll the storage devices "change 57i and 572 simultaneously.

The lagging calculation is performed with an accuracy of 10%, therefore, to simplify the arithmetic unit 13, the numbers being compared are rounded off. If the “change” drive contains, for example, three-bit counters, then two-digit numbers go to the arithmetic unit 13, and if a higher non-zero number is detected in the upper order, then the arithmetic unit 13 “3 blocks 12 rounding numbers numbers are written in the form of two high-order bits; otherwise, two lower-order bits are written in the numbers "plan and" fact. The arithmetic unit 13 performs operations with numbers according to the relation

U {

About -Ik ± b

10 10 - - p,

Pg

As a result of the calculations, the arithmetic unit 13 gives one pulse, if the lag is from 10 to 20%, two pulses, if the lag is from 20 to 30%, and three impulses, if the lag is over 30%. The converter of 7 numbers converts the number of pulses into a code, and the transmitter 8 of a sequential code transmits code combinations about the composition of the information subblock “change corresponding to one or another controlled item.

The control and correction unit 14 contains dial-up switches 79p-79s to the switches in each group (by the number of decimal digits in the number representing the maximum interchangeable task), n elements "OR 80i-80 ,,, switches 811-81, switch 82 of block selection 2i - 2, g of accumulation, switch83 of select accumulator "shift," plan or fact, block 84 elements of AND and elements P1LI, synchronizer 85, including inverters 86 and 87, elements of AND 88 and 89, triggers 90 and 91 and the generator 92 single pulses, button 93 vg. Correction key,

correction switch 94, cyclic switch control switch 95, set button 96 "O, switch of one-time transfer unit control switch 97, block 10 start button 98, as well as outputs 99p-995, over which numerical correction signals are transmitted, and outputs 100 - 100, over which correction signals are transmitted, in single pulses.

Switches 79p - 79d, pack the c-bit numbers, which are interchangeable tasks for the corresponding controlled items. Let the shift assignment for any controlled item be a three-bit number (3).

Then, the sync pulse generator 4 contains three binary decimal dividers 43, 44 and 45 and three shapers of pulse series 46, 47, and 48. Outputs 54i - 549 shaper 46 "units are connected to the same-named parallel contacts of the 7921 - 79 switches 2n" ten, and the outputs 56 - 5b9 - to the switches 79з1 - 79з „„ hundreds. In one basic interval, which is placed an integer number of times in the shift duration, binary divider 43 makes iCTO turns, divider 44 makes ten and divider 45 one turn. In one revolution of any divider 43 - 45, one pulse appears at the first output of each driver 46 - 48,

the second, two, and so on, on the ninth, nine pulses. For example, suppose the plug-in task is 229. As shown in FIG. 5, the number is dialed on the switches 79ii - 79з1 for the first controlled item. Then

for one basic interval, the first input of the element “OR 80 receives 200, the second — 20 —and the third — 9 pulses, and the output of this circuit — 229 pulses. Each of the setters 3i - 3 „“ of the plan is a frequency divider with a division factor equal to the number of base intervals contained in the shift duration. Therefore, at the output of the setting unit 3i of the plan, 229 pulses appear during the shift.

The outputs of the elements "OR 80i - 80" are connected to the inputs of the drives "change 57 of the corresponding blocks 2h - 2" accumulation. Correction drives 57 and 572 "blend ::

all blocks of 2–2 ”accumulations can be produced by entering a number in single pulses. Since these drives are made in the form of phase-impulse counters, the numerical correction can

be forced to set the counter bits to the specified phase state. For a numeric correction, the number that needs to be written to one or another drive is dialed with switches 811 - 81 /. ,

Claims (1)

the contacts of the same name are paralleled and connected to them. Outputs 52o - 52d of the generator 39 numbers (phases) are connected. The switch 82 selects the block 2, - accumulation, in which the adjustable drives 57i I 572 are contained, and the switch 83 - one of them. Switch 94 is set to numeric correction (as shown in FIG. 5). Correction occurs by pressing button 93. At the same time, the element "And 88 And the element" And 89 is closed until the button 93 is in the on state. At the moment of switching of the trigger 91 by pulses with the phase "O-c-output 52o to the zero state and with the element open", and 88 switches to one state trigger 90, applying to the first input of the generator 92 single pulses a preparatory signal. After trigger 91 is not turned off, a pulse with a duration equal to 1 period of the reference sequence (ten periods of the clock sequence) is sent to the second input of the generator 92 through the switch 94, resulting in a pulse of the same duration. only one, regardless of the duration of pressing the button 93. Through the switch 82, the selected elements “AND block 84” are prepared with this pulse, so that the corresponding outputs 99c - 99j; The installation inputs of the selected counters receive pulses with phases corresponding to the specified switches 811–81, and then after turning off the button 93. the trigger 90 is set to its original position. Correction with single pulses occurs in the same way, however, in this case, a clock sequence from output 49 is connected via switch 94 to the second pulse of the single pulse generator 92. Each time the button 93 is pressed, a 0 | Dean pulse of fixed activity is received at the corresponding output 100. A single correction is used to partially test the operation of the device, since the single correction pulses can imitate the signals of sensors 15i - 15, information and setters 3i - 3, "of the plan. The sensors 15i - 15 „of the information contained in the controlled points produce pulses of accounting for the number of manufactured products OR operations performed. If one pulse produced by the sensor indicates the end of a series of operations or the manufacture of a series of products, then the sensor also multiplies the previously known number of operations in the series. The output pulses of the sensors 15i-15 "are fed into the corresponding blocks 2i-2 ,, to accumulate information" fact-shift. The central console 1 is connected via communication channel 101 to each secondary information receiver 17 j. Each receiver 16 and 17i - 17 secondary information contains a serial code to parallel converter 102, a block number decaller 103, 2 g of accumulation, a drive number 104, a accumulator discharge number decoder 105, a drive 21 selector switch 106, and a accumulator in it, elements "I 107i-1072 ,,, memory block 108, decoder 109, display software unit, lag zone switch 111 and lag signaling unit 112. The converter 102 of the serial code in the parallel connection is connected by connections 113 to the decoder 103, connections 114 to the decoder 104, connections 115 to the decoder 105, connections 116 to the elements 107-1072, and 117 — with a storage block m. 108, connections 118 — with a lag switch 11. The inputs of each of the receivers 16 and 17i through the 17 are connected to the output of a line or a drop of communication 101, in which information is continuously circulated to be displayed on the light displays of the display points and the control room. The storage unit 108 and the display software unit are designed for storing and displaying 2, ' decimal places (capacity of the largest information sub unit), and the ' information is displayed simultaneously. The selection of the necessary information block, corresponding to the i-th controlled item, and the information sub-block within this block is performed by the switch 106. The serial code converter to parallel produces the reception of code combinations and detects them in parallel, and converts them to parallel and registration of address combinations. In this case, only those of them that correspond to the selected accumulation blocks and accumulators are recorded. Phasing of the cycles is performed by phasing combinations of the "start of the cycle and" end of the cycle, the phasing of receiving information of the corresponding accumulation blocks and accumulators occurs by addressing combinations, and the phasing The combinations are made by starting and stopping parcels. Synchronization while receiving combinations is maintained due to the stability of the clock generators on the transmission and reception. The decoded address signals of the selected accumulator through the switch 106 arrive at the first inputs of the elements AND 107i - 107 2, the second inputs of which successively in the order of their transmission receive in a parallel code the numbers contained in the bits of the corresponding accumulator. The numbers are then stored in the storage unit 108 and, after decryption, are displayed by the display software unit. If an error is detected from the converter 102 of the sequential code in the parallel relay, through communication 117, a signal is sent to the storage unit 108, through which the information is erased in the last, and the display unit 110 is turned off until the next information is transmitted cycle, the composition of the information group corresponding to the drive "change, in the additional raer de Transmits the code of the backlog zone" fact from the "llan" at the corresponding controlled point. The switch 111 selects one of the three calculated lag zones, depending on the rank of the display point, and the signals of the selected zone are served on the lag signaling block 112. Repeated repetition of the same Information, as well as a certain order of transmission of block numbers 2i - 2 „accumulation“ of drive numbers, known at the receiving side, ensures high accuracy of Information reception. The proposed device for the selection, transmission and reception of information may be npHiMeiieiio for dispatching both individual shops and in general. With a finite number of controlled lungs, the number of display points is not technically limited, and the channels connected to the dispatcher center can be both individual and group channels, depending on the geographical location (dispatch point and display points in various enterprises; Two-wire physical circuits of telephone cables can be used as communication channels. Continuous information circulation In a communication channel, it is possible to Make a choice of "information already per se. You can set the number of controlled points and the number of accumulators in the corresponding information storage unit and select the speed of information transfer, you can select the allowed waiting time of the incoming information on the receiving side. can be either desk, on which the display of the full amount of information is required, and shop floor, on which it is required to display only that information, which belongs to the given controlled point. The annual economic effect from the introduction of the proposed device, calculated on the basis of actual data obtained from the introduction of similar devices, With the number of controlled points - twelve is not less than 125 thousand p. Formula of the device The device for collecting, transmitting and receiving and informing, containing at the controlled points of the sensor and information, at the control room - the point of the blocks - accumulation and - n-formation, the first inputs - which are - connected with the outputs of the corresponding information sensors, one output of the sync pulse generator is connected to the second inputs of the information accumulation units, the correction outputs of the control and correction unit are connected to the third inputs and information accumulation units, the outputs of the task and control unit correction and correction outputs through the corresponding unit of the “plan to the fourth inputs of the blocks — accumulations of information, and the fifth and sixth inputs of which are connected to the first interrogation outputs of the cyclic switch, the OUTPUT of information accumulation blocks — are connected to the information inputs of the output unit information, start-up output of the control and correction unit is connected to the corresponding input of the cyclic switch, the second interrogation outputs of which are connected to the inputs of the information output unit, one information output of which is connected to the c-equal-phase unit inputs, phase-emissive and number-pulse outputs of the clock generator are connected to the corresponding inputs of the control and correction unit, and the clock output is connected to the clock input of a cyclic switch, the clock output of which is connected via the transmitter 1 to the next-to-watt code and parallel communication channels the inputs of the receivers of the secondary information of the points of the mapping, each of which contains a converter. of a sequential code into a parallel, the first output of which is through the decoder of the number b The second output is through the des-ifrator no-measure on-kop-itel, the third output through the decoder of the discharge number of the accumulator is connected to the corresponding inputs of the switch of the selection of the accumulation unit and the accumulator, one outputs of which are connected to the first input of the elements “AND, the control output — to the corresponding input of the serial-to-parallel converter, the information output of which is connected to the second inputs of the elements“ AND, the outputs of the elements “AND are connected to the information inputs of the master block The control input is connected to the corresponding output of the serial to parallel converter, and the outputs are connected to the display unit via the deshifrator, which is designed to simplify the device and increase its efficiency. A number converter, a rounding block, an arithmetic block, an address encoder and a one-time gear block — and the first control outputs of the cyclic switch are connected to the corresponding inputs of the converter; rye - with the inputs of the comparison unit, the third one - with the inputs of the arithmetic unit, two information-input inputs of the number converter are connected to other information outputs of the information output unit, the third input of the number converter is the output of the arithmetic unit, the fourth - to the output generator of sync pulse 1B, output of the number converter is compiled with the second input of the serial code transmitter, the first interrogative outputs of the cyclic switch are also connected to the inputs of the address coder, its two phasing outputs are connected to The corresponding inputs of the address encoder, to which the cycling switch phase outputs are also connected, the first of which is combined with the uninterrupted input of the single-fault block, the output of the address encoder is connected to the third input of the serial code transmitter, the output of which is connected to the second input of the single-loop block, the third input - which is connected to the second trigger output of the control and correction unit, and the output is connected to the input of the receiver of the secondary information of the dispatcher 1, the rounding block inputs l are combined with the inputs of the comparison unit, its output is connected to one input of the arithmetic unit, the other input is connected to the output of the equilibrium block, the lag zone switch and the lag signaling block are entered into each secondary information receiver, and the output "lag of the serial code converter in on | parallel through the lag zone switch is connected to the first input of the lag alarm unit, the second input of which is connected to the output of the dashboard number of the akoplevi information block. L 2 6o "" o oo "" 6 b about c 52o . xn 95 I-Cr „Stop .. Oops. g, -2 „ 36 ss ,, -mn f 98 85 -J.j