SU984035A1 - Adaptive analogue-digital converter - Google Patents

Description

54) ADAPTIVE ANALOG-DIGITAL CONVERTER

one

The invention relates to a measurement technique and can be used in automation systems, computer engineering and communications equipment.

An analog-to-digital converter with an intermediate conversion to a time interval consisting of a zero-body, a generator / 1-voltage, a counter, a clock generator, and a logic block Cl is known.

The disadvantages of this transducer are low noise immunity and low accuracy.

The closest in technical essence to the invention is an analog-to-digital converter with multi-stage integration, containing a source of reference voltage, connected to the key input, a second key, whose input is connected to the device bus input, key outputs, and connected through a resistor to the input of the operational amplifier The feedback circuit of which includes a capacitor, the output of the operational amplifier is connected to a null organ, a clock generator, a counter and a block.

the control, whose input is connected respectively to the taps of the nullorgan and the clock generator, the outputs of the control unit are connected respectively to the input of the pulse counter and to the control inputs of the keys, the output of the counter is connected to the corresponding input of the control unit C2.

ten

The known analog-to-digital converter has a high noise immunity and is characterized by high conversion accuracy.

However, for input voltages with

15 for a large dynamic range of signal variation, the relative conversion error depends on the amplitude of the input signal and is determined by the formula

20

100U, 1 (%), (2 -ilVt. Where D is the relative conversion error;

Vp is the voltage source of the reference voltage, UX is the voltage of the input signal;

Claims (2)

P - the number of bits of the counter. Thus, for input signals with a minimum voltage value, the relative conversion error will be maximum. The purpose of the invention is to increase the conversion accuracy. This goal is achieved by the fact that in an analog-to-digital converter containing a source of reference voltage connected to the key input, a second key, the input of which is connected to the input bus of the device, the key outputs are combined and connected via a resistor to the input of the operational amplifier, The capacitor is turned on, the output of the operational amplifier is connected to the zero-organ, the clock generator, the counter and the control unit, the inputs of which are connected respectively to the outputs of the zero-organ and the clock generator pulses, the outputs of the control unit are connected to the input of the pulse counter I: to the control inputs of the keys, the output of the counter is connected to the corresponding input of the control unit, a second voltage source is supplied, the third key, the second resistor and comparator, the outputs of the third key and the comparator are connected the second input of the comparator is connected to the output of the second source of the reference voltage, the output of the comparator is connected to the input of the control unit, the control input of the third switch is connected to the output of the control unit, the output of the third key through the second, the resistor is connected to the input of the operational amplifier. The drawing shows a block diagram of the proposed converter. It contains the source 1 and 2 of the reference voltage, keys 3-5, comparator 6, control unit 7, counter 8, resistors 9 and 10, condensate 11, operational amplifier 12, zero organ 13, generator 14 sync pulses. Operational amplifier 12,. the capacitor 11 and one of the resistors 9, 10 constitute an integrator circuit. The Converter operates as follows. Let us assume that the measured signal has a voltage greater than the voltage of the source 2 of the reference voltage, TeVj (V.) Then, from the output of the comparator 6, the control unit 7 receives a high signal level. As a result, at the beginning of the conversion cycle, the control unit 7 closes the key 4, the keys 3 and 5 are open at the same time), applying the measured voltage Vx to the integrator input through the resistor 9. At the same time, synchro pulses from the generator 14 begin to flow to the input of the counter 8. After a certain time interval T, the value of which is determined to By the number of impulses received in counter 8 (for example, counter overflow J, the integrator voltage forms -R, cj resistance of resistor 9; C - capacitor 11 capacitance. At this time, control unit 7 opens key 4, resets counter 8 and closes key 3. At the same time, the input of the integrator is a voltage - Vf., From the source of the reference voltage 1. The integration continues from until the voltage at the integrator's output becomes equal to zero. At this point in time, from the output of the nullorgan 13, the control unit 7 receives a low signal level, which blocks the counter 8 and opens the key 3. At this the conversion cycle ends. Since the voltage at the integrator output at the beginning and at the end of the cycle is the same and zero, we can write the equation (-VJolt 0, v. Whence where Tj is the conversion cycle time; n is the number of bits of the counter 8; N is the number S of the counter 8 and at the end of the conversion cycle. If the value of the input signal V is less than the voltage of the source 2 of the reference voltage, i.e. .x TflTO, the control unit 7 receives a low level from the output of the comparator 6. This will cause a short at the beginning of the key conversion cycle 5. At the same time, at the end of the interval T at the output At the end of the conversion cycle, the voltage-at the output of the integrator is described by the equation (-Vr), whence h. where Rj is the resistance of the resistor 10 N. the number in the counter 8 at the end of the cycle.If we take the ratio of resistivity b where E - integer function; to the minimum and minimum levels of the input signal, so that the N numbers in the counter 8 have the same scale, the number S should be divided by 2. This means that in this case the comma from the getchik should be moved to the left of the bit. . A comma transfer signal from control block 7 is output to the device. To maximize the use of all the bits of the counter 8, the voltage f of the source 2 of the reference voltage should not be chosen from the condition. Thus, when the input signal is changed by the input voltage in the range. ,,., The conversion is performed with a relative error D a , Vj (error - Thanks to this circuit, the accuracy of measuring input signals with a minimum voltage is doubled. Invention Adaptive analog-to-digital converter containing a reference voltage source connected to key house, the second key, the input of which is connected to the input bus of the device, the outputs of the keys are combined and connected via a resistor to the input of the operational amplifier, the feedback circuit of which includes a capacitor, the output of the operational amplifier is connected to the zero-body, clock generator, counter and unit control inputs of which are connected respectively to the outputs of the zero-organ and clock generator, the outputs of the control unit are connected to the input of the pulse counter and to the control inputs of the keys, the output of the counter is connected A control unit, characterized in that, in order to increase accuracy, a second reference voltage source, a third key, a second resistor and a comparator, the outputs of the third key and a comparator are connected to the input bus of the device, the second comparator input is connected to the output of the second source of reference voltage, the output of the comparator is connected to the input of the control unit, the control input of the third key is connected to the output of the control unit, the output of the third key is connected via the second resistor to the input of the opera Horo Amplifier. Sources of information taken into account in the examination 1.Shvetsky B.I. Electronic measuring devices with digital readout. Kiev, Technique, 1970, p. 34, fig. eight. 2. Harrison T. Control computers in ACS technological processes. World, 1975, t. 1, p. 309, FIG. 3-87 (prototype).