SU983989A1

SU983989A1 - Trigger device

Info

Publication number: SU983989A1
Application number: SU813238825A
Authority: SU
Inventors: Игорь Иванович Дикарев; Эдуард Константинович Есипов; Геннадий Иванович Шишкин
Original assignee: Предприятие П/Я Г-4665
Priority date: 1981-01-22
Filing date: 1981-01-22
Publication date: 1982-12-23

Description

(54) ТРИГГБРНОБ УСТРЬЙСТВО(54) TRIGGBRNOB DEVICE

Изобретение относитс к импульсной технике и может быть использовано в запоминаю1а1Х и счетных устройствах выиислительной техники и систем управлени .The invention relates to a pulse technique and can be used in memory and counting devices of computer technology and control systems.

Известен триггер,-устойчивый к внешним воздействи м, содержащий триггер, два элемента совпадени , и двге R С-цепи, причем пр мой и инверсный выходы триггера через соответствукицие RC-цепи соединены со входами элементов совпадени , выходы которых подключены соответственно ко входам сброса и установки триггера 1.A trigger is known, resistant to external influences, containing a trigger, two elements of coincidence, and two R C circuits, with the direct and inverse outputs of the trigger connected to the inputs of the coincidence RC, the outputs of which are connected respectively to the reset inputs and trigger setup 1.

Недостаткс1ми .этого устройства вл ютс , больша сложность и недаэстаточна надежность.The disadvantages of this device are greater complexity and insufficient reliability.

Известен также двухустойчивый элемент, содержащий триггер, счетный вход которого йодйлючен ко входу устройства, а вхрды установки и сГфоса соединены соответственно с выходами первого и второго элементов совпадени , первые входы которых объединены и .соединены со вторым входом устройства, а второй вход первого элемента совпадени соединен с одним из выходов конденсаторами через резистор - с выходом триггера 2 .Also known is a two-stable element containing a trigger, the counting input of which is connected to the input of the device, and the stages of the installation and sPhos are connected respectively to the outputs of the first and second matching elements, the first inputs of which are combined and connected to the second input of the device, and the second input of the first matching element is connected with one of the outputs of the capacitors through a resistor - with the output of the trigger 2.

Недостатком известного устройства вл етс низка надежность вследствие возможности по влени на входах элементов совпадени выбросов напр жени недопустимой пол рности.A disadvantage of the known device is low reliability due to the possibility of the occurrence of voltage surges at the inputs of the elements of an unacceptable polarity.

Целью изобретени вл етс повышение надежности. The aim of the invention is to increase reliability.

Поставленна цель достигаетс тем, что в устройстве, содержаицем триг10 гер, счетный вход которого подключен ко входу .устройства, а входы установки и сброса соединены соответственно с выходами первого и второго элементов И-НЕ, первые входа котб15 . рых соединены со вторым входом устройства , а второй вход первого элемента И-НЕ соединен с одним из выходов конденсатора и через резистор с выходом триггера, второй вход вто20 рого элемента И-НЕ соединен с выходом первого элемента И-НЕ, а торой выход конденсатора подключен к одной из шин питани .The goal is achieved by the fact that in the device, the trigger has a ger, the counting input of which is connected to the input of the device, and the set and reset inputs are connected respectively to the outputs of the first and second IS-NOT elements, the first inputs of the switch 15. connected to the second input of the device, and the second input of the first NID is connected to one of the capacitor outputs and through a resistor with the trigger output, the second input of the second NI element is connected to the output of the first NAND, and the output of the capacitor is connected to one of the food tires.

На чертеже представлена схема три25 герного устройства.The drawing shows a diagram of a triple hero device.

Устройство содержит триггер 1, счетный в;ход которого подключен ко входу 2 устройства, а входы установки и сброса соединены соответственно с The device contains a trigger 1, the counting in, the course of which is connected to the input 2 of the device, and the set and reset inputs are connected respectively to

Claims

30 outputs of the first 3 and second .4 elements of NAND, the first inputs of which are connected to the second input 5 of the device. The second input of the first element is NOT connected to one of the terminals of the capacitor b and through a resistor 7 with a trigger output. The second input of the second NAND element is connected to the output of the first NAND element, and the second output 8 of the capacitor is connected to one of the power rails. The trigger device operates as follows. To the first input 2 of the device, which is an information input, (And to the second input 5 of the device, signals are sent that follow with the same frequency, and the second input of the device is a control. When the power is turned on, control level 5 and information 2 inputs are given a logic level 1 In this case, due to the absence of charge on the capacitor 6, the trigger 1 is set to the logical state O, if the bus 8 is a common bus, or to the logical state 1 if the bus 8 is the power supply pole. Suppose that the trigger 1 is set whether in sos Logic O, capacitor 6 is discharged. At the input of the trigger 1 installation there is a logic level 1, at the reset input there is a logic level O that holds trigger 1 in the initial - state. To switch trigger 1, it is necessary to remove the holding signal from the input reset by supplying logic O to control inputs 5 and apply a negative polarity pulse to information input 2. At this at the output of flip-flop 1 logic level 1 appears and capacitor 6 starts to charge through resistor 7. P -NOT 3 and 4 do not change during the switching of a bi-stable element. After charging the capacitor b, control level 5 is supplied with a logic level 1, and a logic level O is set to the output of the NAND 3 element, holding trigger 1 at the installation input in the logical state. At the output of the IS-4 element, there is a level logical 1 Trigger 1 is reset to its original state in a similar way. When interference is triggered by the reset device, trigger 1 in the worst case can switch, become uncontrollable on the inputs and keep the logic in the state 1 for the entire duration of the interference. In this case, the capacitor b will be charged from the trigger output 1 through a resistor 7. The permissible duration of interference is determined in this case by the charging time of the capacitor 6 to the threshold value of the AND-NE element 3. If the duration of the interference is less than permissible, then after its termination under the action the voltage on the capacitor 1 at the output of the element AND-HE 3 retains a logic level 1, and at the output of the element AND-NOT 4 - a level logical O, which returns the trigger i to its initial state. In this case, the output of the trigger 1 sets the level of logic O, and the capacitor 6 is discharged through the resistor 7 to the initial voltage. The restoration of the state of logical 1 trigger 1 occurs in a similar way. The proposed solution provides a permissible level of voltage at the inputs of the NAND elements and the installation of the device in a certain initial state. As a result, the reliability of the trigger device is improved. A trigger device containing a trigger, the counting input of which is connected to the input of the device, and the setup and reset inputs are connected respectively to the VEs of the first and second AND-NOT elements, nepBfcSfe whose inputs are connected to the second input of the device, and the second input of the first AND-NOT element connected to one of the capacitor outputs and through a resistor to the trigger output, which is characterized by the fact that, in order to increase reliability, the second input of the second AND-NOT element is connected to the output of the first AND-NOT element, and the second condensate output and connected to one of the power buses. . Sources of information taken into account in the examination 1. The author's certificate of the USSR 711999, cl. H 03 K 3/286, 1978.

2. USSR author's certificate for application number 2840038, cl. H 03 K 3/286, 1979.