SU980104A1 - Four-quadrant dc signal multiplier - Google Patents

Description

FOUR SQUARE MULTIPLE

(54) DC SIGNALS The invention relates to analog computing and can be used in the construction of analog and hybrid computing devices. Four quadratic clever ones are known) (a1 dc signals using intermediate logarithm and containing standard multiplication units (type 525 PS1), masybtnye resistors, L 1J keys. These multipliers are distinguished by high speed, but low accuracy. Higher accuracy is provided by time - pulsed multiplication devices. The closest technical solution to the proposed one is a four-quadrant multiplier comprising an integrator, an inverter, the first, second and third scale resistors connected between one of the pins, the comparator, the key whose control input is connected to the comparator output, and the information input to the inverter output and the second output of the third scale resistor, the second signal of the first scale resistor is connected to the input of the multiplier The second terminal of the second scale resistor is connected to the output of the integrator and is the output of the multiplier, and the first and second outputs of the comparator are the second and third inputs of the multiplier. The multiplier allows to obtain high precision of multiplication. dc signals 2J. However, it has a low speed when it is necessary to obtain a low level of output voltage ripple, which is a great disadvantage in constructing fast circuits for calculating devices. The purpose of the invention is to increase speed. The delivered set is achieved by the fact that, in a well-known four-quadrant multiplier of DC signals, containing an inverter, whose input is the first information input a multiplier l, the first key, whose information input is connected to the output of the inverter, the comparator, whose inputs are respectively the second information and clock inputs of the multiplier, and the output is connected to the control input of the first key, the integrator, the output of which is the input of the multiplier and three large-scale resistors, the first terminals of which The second terminal of the second large-scale resistor is connected to the output of the integrator, and the second output of the third large-scale resistor is connected to the output of the first switch, the serially connected pulse driver and the control trigger are four and fifth. scaling resistors, second, third, fourth, and fifth switches and impedance capacitor, enter form (pulse output connected to the second input of the comparator, first control trigger output on / off) The control inputs of the second and fifth keys and the second output of the control trigger are connected to the control inputs of the third and fourth keys, the information inputs of the second and fourth keys are combined and connected to the first output of the third scale resistor, the output of the second key and information of the third key and the memory capacitor are connected to the zero potential bus, the first output of the fourth scale resistor is connected to the third key's v-channel, and the first pin of the fifth scale resistor is connected to Connected to the information input of the fifth key, the second terminals of the fourth and fifth scale resistors are combined and connected to the input of the integrator, the outputs of the fourth and fifth keys are connected to the zero potential bus. The drawing shows a functional four-quadrant DC signal multiplier circuit. The four-quadrant multiplier itel contains scale resistors 1-5, inverter 6, keys 7-11, memory condenser 12, integrator 13, comparator 14, driver 15 pulses, control trigger 16, triangular pulse generator,; The four-quadrant DC signal multiplier works in the following way. The third input of the multiplier from the pulse generator 17 is pulsed, for example, triangular. Consequently, rectangular pulses are formed at the output of the comparator 14, the relative duration of which is proportional to the signal of a constant TOK / Ugy, i.e. & (, 5, and the coefficient K is chosen so that. The frequency of the rectangular pulses at the output of the control trigger 16 supplied to the control inputs of the keys 8-11 is twice as low as the frequency of the pulses from the generator 17. The duration of the closed state of the key 7 is set value 6. Consider the processes in steady state, suppose that in the first cycle of operation the keys 8 and 11 are closed, the keys 9 and 10 are open, and the voltage at the beginning of the clock on the storage capacitor 12 is zero. tact, for example The capacitor 12 is changed by the action of three voltages at the time of unlocking the key 7, and the voltage reaches a value that can be approximated by the formula t-Цо ® -) by the end of the first cycle the storage capacitor is discharged to zero by the action (ftbl X switch 7 is open U -VO V -® 5-UBb1xK4) Substitute the value 0 into equation Ш1 and solve the equation with OamuIme; Tg Kg 1 Ka-Kg-Kg and „.and .-- U. Г, К4 ГК2.-к, .- к5 -... U .. ;;. 4 t - «-, .- Кс К« 1,1. Under the condition -j rf-qj -0.5, which corresponds to the ratio of Pu (Ka), we get and -0 Iilii5.f OUT bX-l BXl where the coefficients are determined by the circuit parameters. In the second cycle, the keys 9 and 10 are closed and the keys 8 and 11 open. Since the voltage on the storage capacitor 12 is zero, the output i

the voltage of the integrator 13 does not change. Thus, in the steady state, the ripple at the voltage output is absent. The keys 10 and 11 eliminate the influence of the final resistance of the keys 8 and 9 on the process in the circuit, improving its operation. In particular, a constant integrator input impedance is provided in each clock cycle. In a transient mode, the multiplier is represented by an oscillating link, in which the oscillation coefficient and time constant are determined by the values of resistors and capacitors. By choosing the values of resistors and capacitors, it is quite simple for a given accuracy to select the minimum transient time, which can amount to a value commensurate with the tact time.

The technical and economic efficiency of the proposed technical solution is aimed at increasing the speed of execution of the multiplication operation 10 lOOO times depending on the required accuracy and regardless of the duty cycle of the input signals. This is determined by the fact that in the proposed multiplier the time of the transition process can be achieved from 2 to 6 periods of the SIL signal of the almost zero ripple of the output voltage. In the known multipliers, the magnitude of the pulsations depends on the filter's total time. To achieve ripple 1% of the output voltage in the prototype, working with an accuracy of 1%, the time constant of the filter Tf must be equal to 1OO periods of the PWM signal, then the transient process with a discontinuous input signal is equal to 60O periods of the PWM signal, i.e. 1OO ZOOO times and higher than in the proposed multiplier. If it is necessary to obtain a level of pulsations of 0.1% and an accuracy of 0.1%, the response speed decreases: even more than for a second. Thus, the more accurately you need to implement a multiplying device and the lower you need to get the ripple level of the output voltage, the higher the efficiency of application of the proposed device.

invention formula

A four-quadrant DC signal multiplier comprising an Inverter, the input of which is the first information input of the multiplier, a first key, the information input of which is connected to the output of the inverter, a comparator whose inputs are respectively the second information and clock input of the multiplier, and the output is connected to the control the first input of the key, the integrator, the output of which is the output of the multiplier and three scale resistors, the first terminals of which are combined the second terminal of the first scale resistor n dklyuchen to the inverter input, sec vgeod poklyuchen second scaling resistor to the output of the integrator, and the second terminal of the third scaling resistor connected to the output of the first switch, Oh. This is due to the fact that, in order to increase its speed, a sequentially connected pulse generator and a control trigger, the fourth and third scale resistors, the second and third, fourth and fifth keys and a capacitor without capacitor, the input of the pulse former are connected to the second the comparator input, the first output of the control trigger is connected to the control inputs of the second and fifth keys, and the second output of the control trigger is connected to the control inputs of the third and fourth keys, the information inputs of the second first and fourth keys are connected to the first output of the third scale resistor, the output of the second key and the information input of the third key are connected to the zero potential bus through a memory capacitor, the first output of the fourth scale rezstor connected to the output of the third capacitor, the first pin of the fifth scale resistor is connected to the information input of the fifth key; the second terminals of the fourth and nth of the scale resistors are combined and connected to the input of the integrator, the outputs of the fourth and fifth keys are connected to the zero potential bus.

Sources of information taken into account in the examination

1. Analog and digital integrated circuits. Ed. V.S. Yakubovsky, M., Sov. Radio, 1979, p. 238-239.

2. Graham J. Design and application of operational amplifiers. M., World 1974, p. 196-298 (prototype).

Claims (1)

Claim A four-quadrant DC signal multiplier containing an Inverter- ⁵⁵ tor, the input of which is the first information input of the multiplier, the first key whose information input is connected to the inverter output, a comparator, the inputs of which are the second information and clock inputs of the multiplier, and the output is connected to the control input the first key, an integrator, the output of which is the output of the multiplier and three scale resistors, the first conclusions of which are combined. the second output of the first large-scale resistor is connected to the input of the inverter, the second output of the second large-scale resistor is connected to the output of the integrator, and the second output of the third large-scale resistor is connected to the output of the first key, characterized in that, in order to increase its speed, serially connected shaper pulses and a control trigger, fourth and fifth scale resistors, second, third, fourth and fifth keys and a storage capacitor, the input of the pulse shaper is connected to the second input at the comparator, the first output of the control trigger is connected to the control inputs of the second and fifth keys, and the second output of the control trigger is connected to the control inputs of the third and fourth keys, the information inputs of the second and fourth keys are combined and connected to the first output of the third large-scale resistor, the output of the second key and the data input of the third key is combined and through a storage capacitor, * connected to the zero potential bus, the first output of the fourth large-scale resistor is connected to the output of the third key, and the first output of the fifth scale resistor is connected to the information input of the fifth key; the second conclusions of the fourth and fifth large-scale resistors are combined and connected to the input of the integrator, the outputs of the fourth and fifth keys are connected to the zero potential bus.