SU966665A1 - Multi-coordinate digital interpolator - Google Patents

Description

(54) MULTICOORDINATIC DIGITAL INTERPOLATOR

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The invention relates to a technique for automated control of production processes, namely, devices for use in the numbering programs. Multiple machine control, i A multihopper interpolation device is known that operates according to the method of computing evaluation functions and contains a speed reference unit, interpolation units (but the number coordinates), a counter and a logic node for (interleaving the end of the interconnection and the common control unit 1). The distance to this device is the need for 1 and | division pairs tra at every interpolation section, the difficulty of stabilizing 1sontu1toy speed, high complexity of the algorithm in the software implementation.

The closest technical solution to the present invention is a multi-coordinate interpolation device containing a speed setting unit, a two-coordinate interpolation unit (one less than the number of coordinates), two counters and a matching circuit.

for determining the end of interpolation, the outputs of the first interpolation block are connected to the inputs of the last interpol units and the counters whose outputs are connected to the circuit inputs of the same and the input of the first interpolation unit of speed 2.

However, this device is characterized by the cx filHoro construction depending on the number

10 controllable coordinates, the need to get as source data for total splices on several coordinates, as well as splitting the coordinates into groups, on the basis of two incrementals.

IS

The purpose of a shadow is to simplify the device when interpolating along n coordinates.

Claims (2)

The target target is obtained by a multi-coordinate digital digit interpolator, jg containing a program block and an increment counter, connected to the output of the velocity reference block by a counting input, contains n-1 odno-discharging adders and n-1 blocks of two-coordinate H1H11, and each i The one-digit adder is connected to the first input with the output of the i-th coordinate of the program block and the input of the first coordinate of the i-ro block of two-coordinate interpolation, the second input - with the input of the WTO coordinate of each i-ro block of two-coordinate interpolation and the output (i + l) of a one-bit c) t "mator, while the output of the first one-bit adder is connected to the yctaHOB04HbiM input of the increment counter and the second input (nl) -ro of the one-bit adder is equivalent to the input of the nth coordinate of the program block, each The 1st block of two-coordinate interpolation is connected by a pulse input to the output of the second coordinate of the (i-1) -th block of the two-coordinate interpolation, and the output of the first coordinate of the device is connected to the output of the first coordinate of the device, the pulse input of the first block of two-coordinate interpolation is connected to block output audio speed, and the second output to the ordinates (two-coordinate interpolation unit TSSH - to the output of the nth device coordinates. The drawing shows an interpolator circuit. The interpolator contains a block 1 of the program, a counter of 2 increments, a block of 3 tasks for speed, n-1 of one-bit simulators 4 and n-1 of blocks 5 dBuchcoordat interpolation. Blocks 5 operate according to the method of evaluating estimated functions. To interpolate the direct in n-dimensional space from the program, the values of coordinate increments DH are entered; where i 1, 2, p. The initial program data of the day the interpolation blocks work are: for the first interpolation block 5, the increment in the first coordinate and the amount of the increment scientific research institute for the remaining coordinates AXj; for the second interpolation block 5, the increment in the second coordinate DHg and the sum of n zH AXj, etc .; long the last block is the isj increments along the coordinates AHp, and AXj. The total sum of the increments .f-AX i is entered into the counter 2 from the input of the first adder 4. The system i of the evaluation functions implemented in the device has the form and, X /. Uj Xr-AUz-Uz-AX Uj Xj AYj: Un-, Xn., - AYn-Yn-AXn., Where Ui, Uj,. . ., Un - estimated function functions nn AY 11 LH. -X i-. ) Block 1 of the program enters program data on adders 4. Counter 2 sets the sum of 4-AXj increments in all coordinates, in the registers of the first block 5 sets the values AXi, HL-AXj.B registers of the second block 5 1 n AXj, 2 AXj and t .d., in the registers of the (n-1) -th i of Shock 5, the magnitude of AH ". With the start of the interpolator, the pulses of block 3 arrive at the input of the first block 5 and counter 2. In the first block 5, according to the sign of the function Uj, the prog is output either by sending a pulse to the output of the first coordinate and the first output of the device X, {Ui 0) with the calculation of the new value Ui ( Ul - DI V AYj), or sending a pulse to the output of the second coordinate and to the pulse input Uj O with the calculation of the new value Ui (u UiAXi). Similar operations occur in the following blocks 5. Thus, with each cycle of operation of block 3, a signal is issued only in one of the coordinates. Therefore, the total number of cycles required for the site development is equal to the sum of increments in all coordinates, which will be fixed by counter 2. The proposed multi-coordinate digital interpolator ensures simplicity of the circuit implementation, universality of construction, since the number of coordinates has been increased. by adding a block of interpolation and an adder, the simplicity of the software implementation of the algorithm. Claims of the invention A multi-axis digital interpolator containing a program block and an increment counter, a counting input connected to the output of a speed reference block, is in that, in order to simplify the device during interpolation by p-coordinates, the interpolator contains n-1 one-bit adders and p-1 ftajfx blocks of coordinate interpolation, each i-th one-digit adder connected by the first input to the output of the 1st coordinate of the program block and the input of the first coordinate of the i-ro block of the two-coordinate interpolation, the second input - with the input of the second coordinate of each i-ro block of two-coordinate interpolation and the output (i + l) -ro of the one-bit adder, while the output of the first one-digit adder is connected to the installation input of the increment counter, and the second input (n-1) -th one bit the adder is connected to the output of the p-th coordinate of the program block, each i-th block of the two-axis interpol is connected with a pulse input to the output of the second coordinate (| -1) of the two-coordinate interframe, and the output of the first coordinate with the output of the i-th coordinate The device, the pulse input of the first block of two-coordinate interpolation is connected to the output of the speed reference block, and the output of the second coordinate of the (n-1) -th block of the two-coordinate output of the nth coordinate interpol nc is k dinata of the device. Sources of information taken into account in the examination 1. Methods for preparing programs and interpolators for contour numerical control systems. M., Mechanical Engineering, 1970, p. 57-63. 2. Avtoskoe certificate of the USSR N 451061, cl. G 05 19/18, 1974 (prototype).