SU1141405A1 - Device for converting coordinates - Google Patents

Abstract

COORDINATE TRANSFORMATION DEVICE OF THE DAY, containing a multiplication unit, a counter, an adder, a comparison circuit, a harmonic dependency generator and a control unit, the harmonic dependency generator containing an argument counter, sinus cosine detection blocks, the inputs of which are connected to the output of the lower digit of the argument counter, the multiplication unit contains the first and second registers and the first and second multipliers, the first information inputs of which are connected to the outputs of the respective registers, the second information inputs ervogo and second multipliers connected respectively to outputs of the block of calculating the sine and cosine calculating unit dependencies harmonic generator, the output of the older group of younger bit rows argument counter which is connected to the strobe. the input of the comparison circuit, the output of which is connected to the inputs of the resolution of the multiplier block count. ka multiplication, the outputs of the first and second multipliers are connected respectively. with the input of the counter and the first input of the control unit, the second input and the first and second outputs of which are connected respectively to the output of the character of the adder, the input of the summation and the input of the subtraction of the adder, characterized in that in order to expand the class of solved problems by providing the possibility of calculating the value of the sine of the angle places, a buffer register and a switch are entered into it, and the control unit contains three modulo-two adders and two 2H-IffIH elements, the first inputs of which are connected to the first input of the control unit, in the first and second multiply registers (L are connected respectively to the first and second switches of the switch, the third output Kjj Topoporo is connected to the third, input of the control unit connected to the second inputs of elements 2I-OR, whose outputs are connected to the first and second outputs of the control unit , 4: the information output of which is connected to the output of the device and the first information input of the switch; the second and third information inputs of the SP are connected respectively to the output of the buffer register and the output of the first intelligently the unit resident is multiply; the second input of the control unit is connected to the first inputs of the first and second modulators two, the outputs of which are connected respectively to the third and fourth inputs of the 2I-OR elements, the first and second inputs of the comparison circuit are connected respectively to the fourth and fifth outputs of the switch, outputs from the sixth to the eighth of which are connected respectively

Description

Respectively to the inputs of the control unit, from the fourth to the sixth, which are connected respectively to the second input of the first and first and second inputs of the third modulo-two adders, the output of which is connected, with the second input of the second adder on the dual 5, two, fourth and fifth information inputs of the switch connected, respectively, to the information input of the device and the output of the character of the adder; the output of the higher bits of the argument counter is connected to the control input of the switch.

one

The invention relates to automation and computing and can be used in specialized computing tools of information and measurement systems in electronic devices.

When solving a number of control and measurement problems, it becomes necessary to calculate the sine of the elevation angle. This operation, for example, is used in stabilization devices when it is necessary to stabilize the directional characteristic (hereinafter referred to as HN) of the antenna by the angle of the angle. The task of determining the sine of the elevation angle is to calculate the formula

sin f sintcos-jx: os9 + (sin q sin -y-cos q sinScos) cosE, (1)

where F is the angle of the placej.

q - true angle of elevation;

E - the true course angle;

S is the trim angle

j is the roll angle.

- The operation of calculating formula (1) can be reduced to the following transformations:

determine the projections of the unit radius vector p on the axis of the three-dimensional coordinate system (X, Y, Z) by the true elevation angle:

cos i.t

sin € - projection on Z axis (2)

l

and on the true course angle q:

cos sin q - (projection on the X axis);

cos g cos q - (projection on the Y axis),

rotation of the coordinate system (X, Y, Z) around the X axis at the trim angle & , as a result of which we get the projection of the radius vector on the Z axis in the new coordinate system (X, Y, Z):

sin cos в -cosEcos q sin b z, (4)

rotation of the coordinate system (X, Y Z) around the Y axis by the roll angle j-, which gives the projection of the unit radius vector on the Z axis in the new coordinate system, X, Y, Z

cos sin q sin + (sin 8 cos B - cos q cos q sin 0) cos-J- Z (5)

It is obvious that formulas (1) and (5) are identical with each other.

Thus, the solution of the problem is carried out in four stages:

the decomposition of a single radius vector into orthogonal components of the equatorium in its true elevation. according to formulas (2);

the definition of the projections of a single radius vector for the true course angle q according to formulas (3),

determining the projection of the unit radius vector in the new coordinate system X, Y, Z after turning the trim angle 6 to the coordinate system (X, Y, Z) according to formula (4),

determining the magnitude of the sine of the elevation angle in the coordinate system (X, Y, formed by rotating the coordinate systems (X, Y, z) by the roll angle y according to formula (5),

Known analog electromechanical computing device Cl 3 The device has a number of disadvantages inherent in electromechanical devices: large dimensions, weight and power consumption, low reliability, low speed, as well as large kinematic and dynamic errors.

The closest in technical essence to the invention is a device comprising a control unit, a counter, an adder, a multiplication unit, the first output of which is connected to the input of the counter, and the second is connected to the first input of the control unit, the second input connected to the first output of the adder, the inputs of which are connected with the outputs of the control unit, the comparison circuit, the generator, the first and second outputs of which are connected to the first and second inputs of the multiplication unit, and the third output to the first input of the circuit | Comparison, the output connected to the third input m block multiplication. : The device implements a number-pulse method of coordinate transformation. The advantage of this device is the simplicity of the circuit design, high accuracy of calculation, small dimensions of C2.

However, using a known device, it is impossible to accomplish the task of calculating the sine of an angle.

The aim of the invention is to enhance the functionality of the device by calculating the sine of the elevation angle.

The goal is achieved by having a device containing a multiplier, a counter, an adder, a comparison circuit, a harmonic dependency generator, and a control unit, the harmonic dependency generator containing an argument counter, a sine calculating unit, and a cosine calculating unit, whose inputs are connected to lower-order outputs. The argument argument counter, the multiplication unit contains the first and second registers and the first and second multipliers, the first information inputs of which are connected to the outputs of the corresponding. registers, the second information inputs of the first and second multipliers are connected to the outputs of the sine calculation unit and the cosine generator of harmonic dependencies, respectively, the input of the argument counter of which is connected to the gate input of the comparison circuit whose output is connected to the count resolution enable inputs of the multiplier block multipliers, the outputs of the first and second multipliers - respectively, with the counter input and the first input of the control unit, the second input and the first and second outputs of which are connected together responsibly with the output of the character of the adder, the input of the summation and subtraction of the adder, and the switch, the buffer register and the switch are entered, and the control unit contains three sum modulo two moduli and two elements 2I-OR, the first inputs of which are connected to the first input of the control unit, the inputs of the first and the second register of the multiplication unit is correspondingly with the first and second outputs of the switch, the third output of which is connected to the third input of the control unit connected to the second inputs of the elements 2I-OR, the outputs connected to the first and: by the control unit moves, the information output of the adder is connected to the output of the device and the first information input of the switch, the second and third information inputs of which are connected respectively to the output of the buffer register and the output of the first multiplier of the multiplication unit, the second input of the control block - to the first inputs of the first and second modulators - two, the outputs of which are connected respectively to the third and fourth inputs of elements 2I-ShSch, the first and second inputs of the comparison circuit are connected respectively to the fourth and the fifth outputs of the switch, the outputs of the sixth through the eighth of which are connected respectively to the inputs of the fourth to the sixth control unit, which are connected respectively to the second input of the first and first and second inputs of the third modulo two, the output connected to the second input of the second modulator two, the fourth and fifth information inputs of the switch are connected respectively to the information input of the device and the output of the character of the adder; the output of the higher bits of the argument counter is connected to the control input to mmutatora.

Fig. 1 shows the block diagram of the device, Fig. 2-4 shows functional diagrams of the multiplication unit, the control unit and the switch in Fig. 5, which shows the algorithm of the device in Fig. 6, the time diagram of the device operation. .

The device contains a multiplication unit 1, a generator of 2 harmonic dependencies, a comparison circuit 3, a control block 51 4, an adder 5, a counter 6, a buffer register 7 and a switch 8. The multiplication unit contains registers 9 and 10 and multipliers 11 and 12. The control unit contains adders 13-15 modulo two, elements 2H-OR 16 and 17. The switch contains a line of multiplexers 18-25 and adder 26 modulo two. The device also contains an input of 27 ra: Dius vector, an elevation angle of 28, an input 29 of the first through (p-2) discharge heading yrija, a trim angle input 30, a roll angle input 31, an input 32 (nl) -ro bit course angle, input 31 of the p-th course angle angle, input 34 of the elevation sign, input 35 of the trim angle sign, input 36 of the roll angle sign, .. code output 37 of the adder, output 38 of the buffer register, first and second outputs 39 and 40 multiplication unit, the third output 41 of the switch, the output 42 characters of the adder, the outputs 43 and 44 of the elements 2И-OR, the outputs 45-47 from the sixth to the eighth switch, the outputs 48 51 of the generator g the harmonic dependencies, the outputs of the fourth 52, the volt 53, the first 54 and the second 55 of the switch, the outputs 56 and 57 of the multiplier registers, the output 58 of the circuit 3 are comparable to. neither Consider the operation of the device in four stages. The operation of the device OS, the generator 2, which includes (n + 1s) -discharge counter, n bits of which are used to spread the current angle (argument) by counting clock pulses, and) the high-order bits of the same counter to generate a control code. Moreover, the generated sinus and cosine number impulse codes are shifted one relative to the other by one clock cycle, moreover, the appearance of a transfer pulse from the nth digit of the argument counter (fig.bg) at the outputs of g-generator 2 generates synchronization pulses (fig.Be , 6, |) designed to record the current information in registers 7, 9 and 10 and in the comparison circuit 3 and set to the initial (zero) positions of the adder 5 and the counter 6. The number of pulses

The synchronization channels depend on the properties of the elements used and the method of transmitting information between the elements of the comparison signal, which prohibits the passage of the number-pulse sequence sin N., T by 5 elements. In this example, the 1st, 2nd, and 3rd sync pulses are used (fig.bE, e, g), and the 1st sync pulse for registers 9 and 10, the 2nd sync pulse for register 7, and 5 for the registers 9 and 10 and the counter 6 is the 3rd sync pulse, and for the comparison circuit it is one of the three sync pulses. The first stage of solving the problem corresponds to the control code 00 (Fig. 6, and), which comes from the outputs 48 of the generator 2 to the control inputs of the switch B. The input parameter of the unit radius vector (f 1) in the form of a binary code goes to the information input 27 of the switch 8 and then from its outputs 54 and 55 through registers 9 and 10, where they are remembered when the 1 st clock pulse arrives, to the inputs 56 and 57 multiplying multipliers 11 and 12 block 1 multiplication. The input parameter of the true elevation angle. In the form of a binary code is fed to the information input 28 of the switch 8 and then from its output 52 is entered through the information input to the comparison circuit 3 when the 3rd sync pulse arrives. At the counting inputs of the multipliers 11 and 12 from the first 49 and second 50 codes of the generator 2 are received the number-pulse codes, respectively, of the sine functions sin N T ,,,, W t (fig.By) and cosine cos N (6 b), with the result the outputs 39 and 40 of the multipliers 11 and 12 form a number-pulse sequence sin and cos, where N is the number of pulses, equal to the value of the argument of 90 ° j and the period of the following clock pulses. The gating input of the comparison circuit 3 from the output 51 of the generator 2 receives the linear pulse code of the argument, which is subtracted or added, depending on the value of the information at the input of the foliation-subtraction of the comparison circuit 3, At the first stage of solving the problem, the impulse argument code goes to the subtraction, and at the moment of comparing it with the established code of the value of the true elevation angle at the output 58 (n + 1) -th bit of the circuit 3 comparing with 71 the output 39 of the multiplier 11 and allows the passage of the squad or pulse with the socket output 40 of the cos cos N 1 m t of the knife 12. After the current angle (argument) has been deployed, the generator counter 2, operating synchronously with the comparison circuit 3, outputs 39 a multiplier 11 and generates a sin sin Z pulse code, which is fed to the counter count input 6, where it is converted into a parallel binary code At the output 40 of the multiplier 12, a pulse count code COS & is generated, which is fed to the first information input of control unit 4 and then from its outputs 43 and 44 to summing or subtracting input of the adder 5. Moreover, the number of pulse codes supplied to the first and second information the inputs of the control unit 4 and the inputs of the adder 5 depend on the sign output 42 of the adder 5 itself and the outputs 45-47 of the switch 8. This completes the first stage of the task. At the second stage of solving the problem, which corresponds to the control code 10 coming from the outputs 48 of the control of the generator 2 to the control inputs of the switch, the pulse code from the second output 37 of the adder 5 goes to the first input of the switch 8 and then from its first 54 and second 55 outputs to the quarter and five inputs of the multiplication unit 1 and upon the arrival of the 1st clock pulse are stored in registers 9 and 10 (Fig. 6, l). The input parameter of the true course angle q from the 1st to (p-2) of the bit as a binary code goes to the information input 29 of the switch 8 and then from the fourth output and 52 is entered into the comparison circuit 3 and by the arrival of the 3rd sync pulse commemorated in it. The input parameter of the value (n-l) -ro of the code of the true course angle q is fed to information input 32 of switch B and then from its fifth output 53 to the input of addition –vitations of the comparison circuit 3. The input parameter of the digit value of the true course angle code q is fed to the information input 33 of the switch 8. The values (nl) -ro and n-th bits of the code 5 of the true course angle q determine the sign cos q, which is generated at the output of the adder 26 module two and is supplied from the sixth output 45 of the switch 8 to the second control input of the control unit 4. Upon the arrival of the 1st sync pulse, the sin code obtained at the first stage of the calculation is stored in the intermediate information register 7 (Fig. 6 p). From the first 49 and second 50 outputs of generator 2, the sine and cosine number-impulse codes go to the first and second inputs of multiplication unit 1, respectively, and from the third output 51 of the generator 2 to the gating input of the comparison circuit 3, a linear pulse-type argument code is received, which goes to the subtraction or addition depending on the value of (nl) -ro bit of the true course angle code q. In Fig. 6 m, n, the dotted line shows the operation and state of the () th bit of the comparison circuit 3 upon receipt of a linear number-impulse code for addition. Upon completion of the deployment of the current angle at the output 39 of the multiplier 11, a cos sin sin pulse code is generated, which is fed to the counter input 6, which is set at the beginning of the calculation of each stage as well as the adder 5, upon the arrival of the 3rd sync pulse, to the zero initial state. At output 40 of multiplier 12, the number-pulse code cos cos is applied, which enters the first information input of control unit 4 and further, depending on the value of information on the control inputs, on the summations or subtracting input of the adder 5. This completes the second stage of the task . At the third stage of solving the problem, corresponding to the control code 01, coming from the outputs 48 of the control of generator 2 to the control inputs of the switch 8, from the second output 37 of the adder 5, the number-pulse code cos cos q goes to the first input of the switch 8 and then from its first output to the first the input of the switch 8 and then from its first output 54 to the quarter input of the multiplication unit 1. From the output 38 of the register 7 of intermediate information, the impulse code sin arrives at the second input of the switch 8 and then from its second output 55 to the fifth input of the multiplication unit 1. From the sign output 42 of the adder 5, the sign code of the value cosE cos q is fed to the fourth input of the adder 8 and then from its seventh output 46 to the third control input of the control unit 4 The trim angle 6 input parameter in the form of a binary code goes to the information input 30 of the switch 8 and further from its fourth output 52 is entered through the information input to the comparison circuit 3. The input parameter of the sign of the true elevation angle Zn enters the information input 34 of the switch 8 and then from its sixth output 45 to the second control input of the control unit 4. The input parameter of the Enb trim angle sign is fed to the information input 35 of the switch 8 and then from its BocbMoio output 47 to the fourth control input of the control unit 4 The cos sin q code is stored in the intermediate information register 7. The joint operation of generator 2, comparison circuit 3 and block 1 of multiplication 1 occurs similarly to their operation in the first two stages. When the current angle has been deployed, the counter argument of the generator 2 at the output 39 of the multiplier 11 produces a number-pulse code cos cosq sin & which goes to the third input of the switch 8 and then from its third output 41 to the second information input of the control unit 4, the first information input of which from the output 40 of the multiplier 12 receives the generated impulse code sinE Icos b. C, outputs 43 and 44 of the control block 4, the number-pulse codes are fed to the corresponding inputs of the adder 5, which produces the algebraic summation sin E.E. cos-cos cos q sin 8 Z (figure 6, o shows the summation of sin cos 0 + codes cos. cos q sin b). This completes the third stage of solving the problem. The fourth step of solving the problem corresponds to the control code 11, which is supplied from the outputs 48 of the control of the generator 2 to control the inputs of the switch 8. The pulse code sinE cos ScosEcos q sin 9 from the second output 3 of the adder 5 goes to the first input of the switch 8 and further from its second output 55 to the fifth input of the multiplication unit 1. From the output 38 of the buffer register 7, the number-pulse code cosE sin q is fed to the second input to switch 1 and then from its first output 54 to the fourth input of multiplication unit 1. From the sign output 42 of the adder 5, the sign code of the value (sint cos b - cos E i: cos q sin Q) goes to the fourth input of the switch 8 and then from its sixth output 45 to the second control input of the control unit 4. The input parameter of the roll angle y in the form of a binary code is fed to the information input 31 of the switch 8 and then from its fourth exit 52 is entered into the comparison circuit 3. The input parameter of the value of the nth digit of the true course angle code q is fed to the information input 33 of the switch 8 and then from its seventh output 46 to the third control input of the control unit 4. The input parameter of the sign of the roll angle En is fed to the information input 36 of the switch 8 and then from its eighth output 47 to the fourth control input of the control unit 4 -. From the first 49 and second 50 outputs of the generator 2, the sine and cosine number impulse codes are fed to the corresponding inputs of the multiplication unit 1, and from the third output 51 of the generator 2 to the clock input of the comparison circuit 3, the linear impulse code of the argument is applied to the subtract. At the end of the current angle (argument) expansion from the first output of block 1 multiplying the number of pulses the cosE sin q sin code goes to the third input of switch 8 and then from its third output 41 to the second information input of control unit 4, to the first information input of which from the second output 40 block 1 multiply enters the number of pulses. code (sinE cos 0 - cos cos q sin 6) cos T. From the outputs 43 and 44 of the control unit 4, the number and impulse codes, depending on the information at the control inputs of the control unit 4, are sent to the corresponding inputs of the adder 5, at the second output 37 which we get the binary code of the magnitude of the sine of the elevation angle sin f Z cos sin q sinv + (sin e cos0 -cos Ecos q sin S) cozy. and at the sign output 42 - the sign of the sine of the angle of elevation. This ends the fourth stage of the task. An introduction to a device containing a control unit, a counter, an adder, a multiplication unit, a comparison circuit, a generator, new elements — a buffer register, a switch, and the presence of the indicated connections between the blocks makes it possible, in comparison with a known device, to extend the functionality of the proposed device by calculating sine elevation angle. In the proposed device, accuracy and speed depend on the number of bits of the sine and braid functions 1 nus produced by the generator. times

Fig. 1 0512 which is determined by the required accuracy, with time being 2 2 neither t if-, t where n is the size of the sine and cosine functions; FT- - clock frequency. For example, with display accuracy, sine and cosine functions of 0.02% (for BT, the limiting accuracy is 0.02%) and at MHz (for a 133-series IC, the limit frequency is 20 MHz), the calculation time is t 8 ms which is several orders of magnitude faster than the known device. The proposed device is not less than 15 times cheaper electromechanical system of the known device

fig

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"G" X

Claims (1)

A device for converting coordinates, comprising a multiplication unit, counter, adder, a comparison circuit, a harmonic dependency generator and a control unit, the harmonic generator containing an argument counter, sine and cosine calculation blocks, the inputs of which are connected to the output of the least significant bits of the argument counter, the multiplication block contains first and second registers; first and second multipliers; the first information inputs of which are connected to the outputs of the corresponding registers; the second information inputs of the first first and second multipliers connected respectively to outputs of the block calculating the sine and cosine calculation unit dependencies harmonic generator, the output from the senior group LSBs argument counter which is connected to the strobe, the input of the comparison circuit, whose output is connected to inputs of the multipliers authorization account blo · ^1. As for multiplication, the outputs of the first and second multipliers are connected respectively to the counter input and the first input of the control unit, the second input and the first and second outputs of which are connected respectively to the output of the adder sign, the summing input and the subtracting input of the adder, characterized in that, in order to expand class of tasks by providing the ability to calculate the sine of the elevation angle, a buffer register and a switch are introduced into it, and the control unit contains three adders modulo two and two elements 2I-IPI, first the inputs of which are connected to the first input of the control unit, the inputs of the first and second registers of the multiplication unit are connected respectively to the first and second outputs of the switch, the third output of which is connected to the third., the input of the control unit connected to the second inputs of the 2 AND-OR elements, the outputs of which connected to the first and second outputs of the control unit, the information output of which is connected to the output of the device and the first information input of the switch, the second and third information inputs of which are connected respectively with by the output of the buffer register and the output of the first multiplier of the multiplication unit, the second input of the control unit is connected to the first inputs of the first and second adders modulo two, the outputs of which are connected respectively to the third and fourth inputs of 2I-OR elements, the first and second inputs of the comparison circuit are connected respectively to the fourth and the fifth outputs of the switch, the outputs from the sixth to the eighth of which are connected respectively SU. "1141405, respectively, to the inputs of the control unit, from the fourth to the sixth, which are connected respectively to the second input The first and second inputs of the third adder are modulo two, the output of which is connected, with the second input of the second adder modulo two, the fourth and fifth information inputs of the switch are connected respectively to the information input of the device and the output of the adder sign, the output of the upper digits of the argument counter is connected with the control input of the switch.