SU960857A1 - Extrapolator - Google Patents

Description

one

The invention relates to analog computing and can be applied in information transmission systems for recovering an interrupted signal.

Extrapolators are known that form the extrapolating function according to the signal characteristics measured at the time of the start of extrapolation 1.

The known-also electropulator, in Q of which discrete signal differentiation is performed, which reduces the accuracy at high frequencies 1.

However, the design of such an extrapolator cannot provide extra-) 5 polynomials with a polynomial higher than second order.

The closest to the technical essence of the known is an extra polator containing a series of parallel-connected channels in the number of terms of the extrapolating polynomial. Each channel contains the first key connected in series, storing

an element, a second key, and several integrators, the number of which is equal to the order of the corresponding term of the extrapolating dependence. The input of each channel is supplied with the corresponding derivative of the input signal.

A disadvantage of the known extrapol mountain number of channels with increasing order of extrapolating polynomial, i.e. design complexity and low reliability.

The purpose of the invention is to simplify and increase the reliability of the extrapolator.

Claims (2)

The goal is achieved by the fact that an extrapolator containing n serially connected differentiators, the input of the first of which is the input of an extrapolator, and the output of the nth differentiator is connected via a key to the input of the storage element, as well as n sequentially connected integrators the output of the nth integrator is connected to the first input of the adder, the output of which is the output of the extrapolator, and the control input of the switch is connected to the interrupt bus of the extrapolator, contains a low-pass filter, the input of which is connected to the input of the strapol torus, yield - a second adder input, and an output of the memory element coupled to the input of the first integrator. The drawing shows an extrapolator scheme. It contains the filter 1 of the lower clock, adder 2, differentiators 3-iЗп key k, memory element 5, integrators. The extrapolator also contains an input 7, an interruption bus 8 and an output 9 of an extrapolator. Extrapolator works as follows. .In the presence of the input key is closed. The constant component of the input signal is extracted by filter 1 and is fed to the first input of the adder 2. The variable component of the input signal is fed to the input of the differentiators, the resulting n-derivative is continuously stored in the storage element 5 and fed to the integrator 6i-6n, where , (., U (t) U, where tfl is the moment of signal loss, is the voltage at the output of integrator 6y at time tg. Thus, the voltage at you during the course of integrator 6 is represented by Taylor series. The signal at the output of adder 2 after time tg will be a The critical continuation of the input signal up to this point in time. The number of links n is determined by the required accuracy of restoring the input signal with given temporal characteristics for the required period of time after its disappearance. Using its accumulator integrators leads to a simplification of the design of the extrapolator in comparison with the known as the extrapolation order increases, the simplification effect increases. This determines the technical and economic effect of using the invention. Claims of the Invention Extrapolor containing connectionally differentiated n times, so that the output of the n-th integrator recovers a variable component of the input signal, which is fed to the second input of the adder 2. Thus, the signal at the output of the adder 2 is equal to the input signal. At the time the input SI1 signal disappears by the control signal, the key 4 is disconnected. In this case, the storage element 5 has a voltage equal to the n-th derivative of the input signal at the time the signal disappears, and the output voltage of the first integrator b is -1) -th derivative, etc., at the output of the nth (last) integrator 6 (- voltage of the variable component of the input signal, the constant component of the input signal at the output of filter 1 retains its value during the extrapolation interval Therefore, at the output of adder 2, Igna equal to the sum variable and constant components of the input signal at the beginning of extrapolation. The voltage at the output / 1ntegratora 6 during the extrapolation is of the form t-t.) F F 5 /. ,,, N k о - П1 3 entrance of the first of which vatorov. The output of the extrapolator and the output of the nth differentiator are connected via a key to the input of the storage element, as well as n series-connected integrators, the output of the nth integrator connected to the first input of the adder, the output of which is the output of the extrapolator A key input is connected to an extrapolator interrupt bus, characterized in that, in order to simplify and increase reliability, it contains a low-pass filter, the input of which is connected to the extrapolator input, the output to the second, the adder input, and the output signal inayuschego element - to an input of the first integrator. Sources of information taken into account in the examination 1. USSR author's certificate No. 67368, cl. G .06 G 7/30, 197. 2 USSR Author's certificate no., Cl. G 06 Q 7/30, 1950 (prototype).