SU955070A1 - Priority device - Google Patents

Description

one

The invention relates to computing, in particular, to priority service devices, and can be used in digital computers and discrete automation devices.

A prioritization device is known that contains a register of applications, priority registers, a control trigger, a busy trigger, and a group of I 1 elements.

Closest to the proposed is a priority device containing, the Q register of indication of requests, two groups of AND elements, OR elements, two AND elements, and a delay line 2.

A disadvantage of the known devices is low speed.

The purpose of the invention is to increase the speed of the device.

The goal is achieved by having a priority device containing two n-bit registers (where n is the number of requests), a group of n elements, AND and the jo element OR, the single inputs of the first register being the request inputs of the device, the service end input and the input of the initial installation of the device are connected respectively to the first and second inputs

the OR element, whose output is connected to the zero inputs of the second register, the single input of each i-ro (i 1, ..., n) bit of the second register is connected to the output of the i-ro element AND group, the single outputs of the first register are connected to the first inputs of elements of the same name and group, a pulse generator is introduced, the output of which is connected to the clock inputs of the bits of the second register, the single outputs of which are the information outputs of the device, each i-th zero output of the second register is connected to the i-th clock input of the first register, each nd i-th zero output is connected to a corresponding input (i + 1) th and subsequent elements of group And, zero inputs of the first register are connected to the input of the initial installation.

The drawing shows the block diagram of the device.

The device contains a register 1 with triggers 2-4, a register 5 with triggers 6-8, a group of elements And 9-11, a generator of 12 pulses, an element OR 13, request inputs 14-16, information outputs

17-19 devices, service end input 20, setup input 21.

The proposed device works as follows.

Highest; Trigger input 2 has priority; Trigger input 4 has the lowest. Registers 1 and 5 are set to the zero state by the initial setup signal. When requests are received on inputs 14-16, the triggers 2-4 of register 1 are set to one. The signal from the zero output of the trigger 2 with the highest priority closes the elements 10 and 11 bits with the lowest priority, and the signal from the single output of the trigger 3 through the open element 9 dehydration, sets the "1 trigger 6 register 5 on the positive edge of the signal generator output 12 pulses. At output 17, the unit level appears and initiates servicing of the device with the highest priority. The signal from input 20, indicating the end of the request service, resets to "About trigger 6 of register 5, which sets the positive edge of the zero output to" About trigger 3 of register 1. The signal from zero output of trigger 2 opens AND 10 and 11, allowing the service requests with a lower priority, i.e. a service request for input 15, since its priority is higher than the priority of a request for input 16.

The application of the invention allows to increase the speed of the device.

Claims (2)

1. USSR author's certificate number 475622, cl. G 06 F 9/46, 1975. 2. USSR author's certificate No. 600557, cl. G 06 F 9/46, 1976 (prototype).