SU884121A1 - Analogue-digital converter - Google Patents

Description

(54) ANALOG-DIGITAL CONVERTER

I

The invention relates to measuring and computing technology and can be used in analog-digital converters (ADC) ..,

There is an ADC containing a working phase shifter, two conversion stages (coarse and precise), each of which consists of a series of threshold elements, an encoder and a number register unit, and two opposite-polarity compensating current blocks (1.

The disadvantages of this device are high hardware costs and low accuracy of analog-to-digital conversion, which is due to the presence of two identical stages of conversion (coarse and precise), as well as instability of setting threshold elements, especially in the exact stage of conversion.

The closest to the invention in terms of technical significance: is a device containing a reference voltage generator, a working phase shifter, a rough conversion stage consisting of a series of threshold elements, encoders and a number register unit, a compensating current block, a key, exact conversion step consisting of. a series of threshold elements, an encoder and a number register block, as well as a control unit 2.

The disadvantages of the known device are large hardware costs (two identical in terms of equipment conversion stages), reducing its reliability and complicating configuration and operation, as well as low accuracy due to the disruption of the normal sequence of triggering threshold elements when the converted signal level changes.

The purpose of the invention is to increase the conversion accuracy and reduce hardware costs.

This goal is achieved in that the ADC contains a working phase shifter, a block of threshold elements, a switch, a number register block, a compensating current block, a control block, and a reference voltage generator, the output of which is connected to the second input of the block of threshold elements simultaneously, the third cat entrance (og6

through the compensating current block is connected to the output bus and the output of the number register block simultaneously, the last input through the encoder is connected. To the output of the block of threshold elements, the first input of which is connected to the output of the working phase shifter, whose first input is connected to the bus of the converted signals, entered / tunable phase shifter , pulse generator, pulse generator and counter, the output of which is connected to the output bus, the counting input is connected to the pulse generator, and the control input is connected to the output of the sensor pulse, the first, second and third inputs of which are respectively connected to the outputs of the working phase shifter, tunable phase shifter and a control unit, wherein a tunable phase shifter input coupled to the output of the reference voltage generator.

The drawing shows a functional diagram of the device.

The analog-to-digital converter contains a voltage generator I, a working phase shifter 2, a block of 3 threshold elements, an encoder 4, a number register block 5, a compensating current block 6, a tunable phase shifter 7, a pulse shaper 8, a counter 9, a control unit 10 and a generator 11 pulses.

Analog-to-digital converter works as follows.

During the first conversion cycle, the signal from the output of the working phase shifter 2 with a phase shift fx proportional to the value of the converted signal 1x (W) receives the first input of the block 3 threshold elements. The second input of this block from the output of the generator 1 of the reference voltage receives the reference voltage.

Depending on the value of pjc in block 3 threshold elements, a certain number of threshold elements (phase comparators) are triggered, after which, using the encoder 4, the number of most significant bits of the digital code is generated and recorded in block 5 (for this, in block 3 threshold elements have (2-1) phase comparators and the same number of reference phase shifters to form the reference phase shifts of Chad;).

The current proportional to the code m higher bits generated in the compensating current unit 6 is supplied to the third input (to the compensation winding) of the working phase shifter 2. As a result, the phase of the output voltage of the working phase shifter 2 shifts in the opposite direction to that in which it shifted convertible signal - the phase shift of the output voltage of the operating phase shifter is compensated.

At the end of the compensation, the output voltage of the working phase shifter 2 has some "residual phase shift" fgj., Less than the discreteness of the block 3 threshold elements.

During the second clock cycle, the value of the avg.,. The first and second inputs of the pulse driver 8 receive voltages from the outputs of worker 2 and tunable 7 phasers, respectively. The signal from control unit 0 arriving at the third input of driver 8 gives permission to form a time interval proportional to the value of f, after which the meter is filled 9 pulses of a stable frequency from the generator 11 pulses and the formation (m - n) of the lower bits of the output code.

Improving the coding accuracy in the proposed device is achieved by eliminating the block of threshold elements in the exact transform stage, which allows the low-order bits to be determined in a parallel fashion. The formation of the lower bits of the code is carried out in a sequential way, which automatically eliminates the possibility of triggering the higher threshold elements earlier than the younger ones with an increase (decrease) in the level of the converted signals.

Since the determination of the lower bits of the code can only be carried out

At the end of the compensation process, the magnitude of the residual phase shift is always in the initial part of the output characteristic of the working phase shifter 2. The formation of the lower bits of the code can be performed by the time-pulse method, because, due to the smallness of this portion, the coding error due to its non-linearity is negligible is small.

Claims (2)

1. Materials of the seminar “Switching and transformation of small signals LDNTP, 1974, p. 65-67. 2. "Instruments and control systems, 1972, No. 8, p. 40-43. }