SU843222A1 - Time interval-to-digital code converter - Google Patents

Description

(54) TIME INTERVAL CONVERTER IN DIGITAL

CODE

The invention relates to information and measuring technology and can be used in analog-to-digital information converters. . A known converter is a time interval into a code using the classical sequential counting method, in which the converted interval is filled with a clock generator pulse having a stable frequency. The magnitude of the time interval is determined by counting the number of pulses laid down in a given time interval fl. A disadvantage of the known transform bodies is that the uncertainty in the location of the stop pulse relative to the nearest counting pulse creates an error in determining the time interval, the maximum value of which is equal to the repetition period of the counting pulses. Closest to the proposed technical essence of the Converter containing the first, second and third triggers, first, second and third valves, a collective key and the first and second delay lines (LZ), having a delay time equal to half the period of the counting pulses. The device allows rounding the measured time interval without increasing the counter size, and has a quantization error not exceeding a half-period of the following counting pulses D. The disadvantage of this converter is that it contains delay lines formed by reactive elements that are large in microelectronic design the area of a semiconductor crystal and therefore difficult to implement in the form of integrated circuits, especially with a high degree of integration. In addition, if necessary, change the repetition rate of the counting pulses, it is necessary to replace or rebuild

delay lines whose delay time should be half the counting pulse period. This leads to a complication of the device.

The purpose of the invention is to simplify the device and expand its functionality.

The goal is achieved by the fact that two D-triggers and an OR-IE element are entered into the time interval into the digital code containing the start-up stop triggers, the counting pulse generator and the counter, and the forward output of the stop trigger is connected to the C-input , the house of the first D-flip-flop and the O-input of the second 0-flip-flop, C-input of which is connected to the output of the generator of counting pulses, D-INPUT of the first Dtrigger and the first input of the OR-NOT element, the second, third and fourth inputs of which are connected respectively to the inverse starttrigger output, direct output Od of the first O-flip-flop and the direct output of the second O-flip-flop, the output of the OR element is NOT connected to the input of the counter.

FIG. 1 shows a functional diagram of the converter, in Fig. 2, time diagrams of potentials at the points indicated in the functional diagram.

The converter contains control triggers 1 (start) and 2. (Stop) with tires 3 and 4 start and stop pulses, respectively, a generator, 5 output pulses, synchronized D-triggers 6 and 7, an OR-NOT element and a counter 9 pulses.

Tires 3 and 4 are connected to the installation inputs of control triggers 1 and 2 respectively, the generator 5 of counting pulses is connected to the information input of trigger 6, to the synchronization input of trigger 7 and to the first input of element 8, the inverse output of trigger 1 is connected to the second input of element 8 , direct output of flip-flop 2 is connected to synchronization C- and to informational D-inputs of flip-flops 6 and 7, respectively, direct output of flip-flop 6 is connected to the third input of element 8, single output of flip-flop 7 to fourth input of element 8, output of elements and 8 - 9 to the input of the counter.

The Converter operates as follows.

In the initial state, the triggers 1, 2, 6 and 7 are set to zero (the bus

flush triggers in FIG. 1 not specified). At points b, g, d, the potential is zero, and at point c, the potential is one. The counting pulses a, having the form of a Meander, do not pass through element 8, since the latter is locked by a single potential from the output of the trigger 1. The choice of the form of the counting pulses leads to the fact that during their first half-period there is a single potential at the information input 6 the time of the second half period is zero.

The arrival of bus 3, the start-up pulse of which the leading edge must be synchronized with the leading edge of the counting pulse, which is zero counting, triggers trigger 1. This causes the appearance at the point at zero potential and unlocking of the element 8, from the output of which counting pulses, and inverted in phase, begin to enter the counter 9. For. counting pulses of the specified form phase inversion is equivalent to a half-period delay (point h). Pulse counting continues until a stop pulse (4) appears on tire 4, the phase of which is random relative to the leading edge of the counting pulse. The stop pulse (r) transfers trigger 2, which results in the appearance of a single potential at point d. Further operation of the yctrops depends on which half-period of the counting pulse the trigger moment of the trigger 2 occurs.

Consider the case when the moment of appearance at the point d of a single potential coincides with the first half-period of the counting pulse (in Fig. 2 this case is shown by solid lines, i.e. the presence of a single potential at the information input of trigger 6. This leads to the recording of a single potential in trigger 6 at the moment of arrival of a stop pulse. The appearance of a single potential at point e causes blocking of element 8 and the cessation of pulses arriving at the counter, 9. But since at point 3 the counting pulses are inverted in phase, the blocking of element 8 oiskhodit when the presence on its output and zero potential part not prLsodit counting pulse to the counter 9.

Thus, the result of the conversion is rounded down.

Consider the case when the moment of appearance at point d of a single potential coincides with the second half-period of the counting pulse (in Fig. 2, the diagrams corresponding to this case are shown in dotted lines). At this moment, there is a zero potential at the information input of the trigger 6, which is stored at the direct output of the specified trigger after occurrence at point d of the single potential, t, e. lock element 8 at the moment does not occur.

The trigger 7, on the information input of which there is a single potential, triggers with the arrival on its clock input of the next counting pulse following the trigger trigger 2, i.e. with some delay (point g). The magnitude of this delay is equal to the time interval that supplements the measured time interval to a value that is a multiple of the integer number of counting pulses. The injection of the element 8 occurs with a single potential at the point x, which makes it possible to pass to the counter 9 another countable pulse, i.e. the result of the conversion to the big side is rounded off. Distortion of the duration of the last counting pulse transmitted to the counter, neither in the first nor the second case occurs.

It should be noted that the triggering of the trigger 7 also occurs in the first case, but after the triggering of the trigger 6 and therefore no longer affects the operation of the device.

Thus, the converter rounds the result down if the stop pulse is in the first half period of the counting pulse, and more if the stop pulse is in the second half period, which corresponds to halving the maximum quantization error.

 The trigger state at the end of the transformation can also serve as an indication of which way the result is rounded off.

The use of a converter in analog-digital devices solves the problem of their implementation in microelectronic design, allows conversion at any frequency of the counting pulses (within the speed of the circuit elements) without any switchings or adjustments.

Claims (2)

1. Gitis E.I. Information converters for electronic digital computing devices. M., Energie, 1975, p. 235. 2. USSR author's certificate number 544939, cl. H 03 K 13/20, 1977. U Phie.1