SU824195A1 - Matrix computing device - Google Patents

Description

(54) MATRIX COMPUTING DEVICE

one

The invention relates to computing and can be used in high-speed processors and specialized computing devices.

Matrix computing devices are known for performing the operation of dividing binary numbers 1.

The disadvantages of matrix computing devices are limited functionality with a given set of nodes and the connections between them.

Closest to the proposed technical entity is a matrix computing device for performing the operation of dividing binary numbers, which contains a matrix of computational cells, each of which contains a modulo two and a one-bit adder C

A disadvantage of the known matrix device is the limited functional capabilities that ensure the performance of only one arithmetic division operation of binary ones.

numbers

The purpose of the invention is to enhance the functionality of the device

by calculating additional functions

u-ix / v, vi / x, u - () / v, z (.xv) / y. The goal is achieved by having a matrix computing device containing a matrix of computing cells, each of which contains a modulo two and a one-digit adder, each first and second inputs of the computational cell in each computational cell are connected respectively to the first and second inputs of the modulo two adder, the output of which is connected to the first input of the single-digit adder, the first input of the computational cell is connected to the first output of the computational, third and the fourth the computation cell moves are connected respectively to the second and third inputs of a one-bit adder, the first output of which is connected to the second output of the computational cell, and the second output of the single-digit adder to the third output of the computational cell, the second input of the computational cell, and the first outputs computational cells of each column of the matrix are connected respectively with the first inputs of the computational cells of the previous column of the same rows of the matrix, the second output The computational cells of each row of the matrix are connected respectively to the third inputs of the computational cells of the next row of the same columns of the matrix, the third outputs of the computational cells of each column of the matrix are connected respectively to the fourth inputs of the computational cells of the subsequent column, the same rows of the matrix, the fourth outputs of the computational cells of each the rows of the matrix are connected respectively to the second inputs of the computational cells of the next row of the previous columns of the matrix, the first output and the fourth input of the calculation A low-order junction cell. Each row of the matrix is interconnected, with the second inputs of the computational cells of the first row of the matrix connected to the first inputs of the device, the third inputs of the computational cells of the first row of the matrix are connected to the second inputs of the device; a matrix of computational cells, the first input of the computational cell of the highest bit of each row of the first matrix is connected to the input of the corresponding element NOT and to the third output of the computational cell the older bits of the previous row of the second matrix, the outputs of the el elements are NOT connected to the first outputs of the corresponding computational cells of the older bits of the next row of the second matrix, and the second and third inputs of the computing cells of the first row of the second matrix are connected respectively to the third and fourth inputs of the device, the first input the high-resolution computational cell of the first row of the first matrix of the computational cells is connected to the fifth input of the device, the second inputs of the computational cells of the higher-order bits In addition to the first, the rows of the first and second matrix are connected to the sixth inputs of the device, the second outputs of the computational cells of the last row of the first matrix are connected to the outputs of the device, and the number of rows of the first and second matrix is equal to the number of their columns. The matrix computing device performs the operation of dividing and calculating the following functions U - ZX / V, M / X, U - (., Z4X-V) / V and works according to the difference-1 interaction method. For the implementation of the operation, it is selected for the denominator and one of the factors of such a common for them knife-ИI.1a.2- about that it will bring the value of the denominator closer to the value equal to the second factor of the numerator, and change the value of the numerator as many times. As a result, the following equalities 00 - (BUT, ... 1.2 are limited to the first terms of the sum, and neglecting the error, we can assume that at the) -th iteration the transformed denominator. will be equal to Z. Then the value of b,. found from (1) and substituted into (2) will give Thus, the result of the aspiration is aspiration. The iteration process is carried out according to the following algorithm, -v, ecM, c, -slgmY -l, i o, 1-stop, if J.-0 T.,,. the initial conditions of x, for the implementation of the operation is chosen for X such a factor VM. | c.2, - (.), which with the appropriate selection of peratorov, + lV directs the knowledge of the argument x to a value equal to one ... (3 ) By acting on the same iterative process with the same law of variation of the operator q. For a change in the value of the function and accepted for its initial value, we obtain the following expression to approximate the desired function. .2 Restricting the first terms of the sum and neglecting the error, we can assume that at (iv-iy-f iteration the transformed value of the argument x will be equal to one. Then the value of the coefficient found from (3) and substituted into (4), gives an iterative process of computing this operation is described by the following relations 4r-i-V4V2-X ,, .X,., V.X2- (q. "sig-h z- Z bo, -,, i., - X2 -tiM) With initial conditions x.,, To implement the operation, u (Ay) matches the operands x and y and the coefficients.. 1 P4 - SQ - ((,., which could be saved during the iteration process Operand x To zero with a predetermined error, where n is the number of iterations. The values of the operands, taking into account the chosen coefficients k and k, can be expressed by the relations X - X - | cv.2 -, - xxv.2. (5) from the Y-X catch, and substituting the result in (6), we conclude that the result of the aspiration is Y (x + Y) / Y. Here the condition must be fulfilled. The iterative process of calculating this operation is described by the following relations mi x ,, x ,, o ;, ,,,. -I, u. -si nz - l J Ji × (- t. & CAM, if, with initial conditions x x, v –V; For implementations of the operation z «(x-y), we impose on the iterative process of changing operands with a law to change the law of equal factors of the form VSM-cv52-. The approximation of the operand x will be considered as the sum of the initial value of the operand x and the approximations of the operand (6) and Y, and the approximation of the operand v as the difference between the initial value of the operand Y and the approximation of the operand x. . x.-x ri-i: cv-2- l (T) -ooE J. - V-4l-Scv Z. I require that the approximation of the operand V strives to take a value equal to the desired dependence, i.e. 1 imy: /, z The algorithm for calculating the dependence follows from (7) and (8) and is described by the following relations, s, T -, - xG, - f, cV - eigMx - Ipslit,.) H, stop if -j- -o with initial conditions,. yy x, xy In FIG. 1 shows a block diagram of a computational cell of a device; FIG. 2, - block diagram of a matrix computing device -. Each computational cell contains an adder 1 modulo two, a one-digit adder 2, first, second, third, and fourth inputs. 3-6, first, second, third, and fourth outputs 7-10. Matrix computing device i contains the first and second matrices 11 and 12 of the computational cells of computational cells 13, n elements of the NOT second matrix.14, the first and second inputs 15 and 16 of the device, the third and fourth inputs 17 and 18 of the device, the fifth input 19 of the device and device outputs 20, sixth device inputs 21. Matrix computing device operates as follows. Each matrix performs a calculation based on the recurrence relation. type,., cV, xa - (- e1e X and y - operands arriving at the inputs of the matrix; q - is the element that determines the type of operation to be performed (addition. or subtraction). q. is formed on the third output of the computational cells of the highest bit of the 1st row of the second matrix 12 and limits the type of operation performed by the subsequent row of both matrices, then the read row is performed in the next row of the matrix, and the converse step is followed by the add row in the next row of the matrix. the row of the second matrix performs the addition operation, and in the subsequent row of the first matrices are subtraction operations, Shifting one of the operands to the right by (i + 1) bits (which corresponds to multiplying by) is performed by intra-matrix connections. When all these dependencies are fulfilled, the device works according to a single algorithm and the difference is only in initial conditions. When calculating the dependences, x / y to the inputs 15-18 of the device are given respectively the values of the operands 0, 5ho; Uo UTsGy-y At input 19, the potential corresponding to sign 0, i.e. if the sign of fo is negative, then a single potential is given, and if the sign is positive, then a zero potential is given. At output 20, we obtain the result value u ZX / y. The division operation acts as a special case of calculating the dependence u xz / y. To do this, you need to take, 5, and the value of Y is taken as 0.5u, as a result we get the value. To calculate the dependence Vl / x on input 15-18, the following values of 0.5y are given (5; Wo i i where y 0.5; xx;, 5-x To the input, 19, the potential corresponding to the sign Output 20 gives the result value. To calculate the dependencies and (- (y) / y, inputs 0.5-18, respectively, 0.5ho, 0.5x, Zfj, are inputted to inputs. A signal corresponding to the sign ZG- is outputted to input 19. Output 20 we obtain the result value and () / y. To calculate the dependence z - (xy) / y, the inputs 15-18 are given respectively O, 5ho; Wo; O 5Uo; i Ho x + y; yo y-x ;, 5-y. At the input 19 delivers potential corresponding to the sign ZQ. At the output 20, we obtain the value of the result z (xy) / y. A zero potential is always supplied to the inputs 21. The effectiveness of the invention consists in extending the functionality of the matrix calculating device compared to the known one by performing calculations of additional operations U-ix / V; and (2i (XV) / V Formula of the invention: A matrix computing device containing a matrix of computational cells, each of which contains a modulo two and one-digit adder, each in The first and second inputs of the computational cell are connected to the first and second modules modulo two inputs, the output of which is connected to the first input of the single-digit adder, the first input of the computational cell connects to the first output of the computational cell, and the third and fourth inputs of the computational cell are connected respectively with the second and third inputs of the single-digit adder, the first output of which is connected to the second output of the computational cell, and the second output of the single-digit adder - with tr The output of the computational cell, the second input of the computational cell is connected, with the fourth output, of the computational cell, the first outputs of the computational cells of each column of the matrix are connected respectively to the first inputs of the computational cells of the previous column of the same rows of the matrix, the second outputs of the calculator. connected respectively to the third inputs of the computational cells of the next row of those matrix matrix columns, the third outputs of the computational cells of each column of the matrix are connected The fourth outputs of the computational cells of each row of the matrix are connected respectively to the second inputs, the computational cells of the subsequent row of the previous columns of the matrix, the first output and the fourth input of the computational low-order cells of the matrix are connected. the second inputs of the computational cells of the first row of the matrix are connected to the first inputs of the device, the third inputs of the computational cells of the first the second row of the matrix is connected to the second inputs of the device, characterized by; e with the fact that, in order to expand the functionality of the matrix computing device by calculating additional functions of the form ZX / SV, (, UV) / V, n additional elements and a second matrix of computational cells are added to it, with the first input of the computational cell the bit of each row of the first matrix is connected to the input of the corresponding element NOT and with the third output of the computational cell of the higher bit of the previous line of the second matrix, the output of the elements is NOT connected to the first output 1 and the corresponding The higher-order computational cells of the next row of the second matrix, with “all the second and third inputs of the computational cells of the first row of the second matrix, are connected respectively to the third and fourth inputs of the device, the first input of the computational senior cell of the first row of the first matrix of computational cells is connected with p telm device input, the second inputs of the computational cells of the higher bits of each, except the first, the rows of the first and second matrix are connected to the sixth inputs of the device, the second outputs will calculate The main cells of the last row of the first matrix are connected to the outputs of the device, and the number of rows of the first and second matrix is equal to the number of their columns. Sources of information taken into account in the examination 1.Guild N. Same Cellular Logic Arrays for Non-Resto ging Winaru Division, The Radio and Electronic Eng, 1970, 39, 6, p. 345-348. 2. Majithia T, C, Nourestorinq Binary Division Usinqa C.etlular Array, Electronic Letters, 1970, 6, No. 10, p. 303-309 (prototype).

Claims (1)

Claim A matrix computing device containing a matrix of computing cells, each of which contains an adder modulo two and a single-bit adder, and in each computational cell, the first and second inputs of the computational cell are connected respectively to the first and second inputs of the adder modulo two, the output of which is connected to the first input single-bit adder, the first input of the computing cell is connected to the first output of the computing cell, the third and fourth inputs of the computing cell are connected respectively to the second and third inputs of a single-bit adder, the first output of which is connected to the second output of the computing cell, and the second output of the single-bit adder is connected to the third output of the computing cell, the second input of the computing cell is connected. with the fourth output of the computing cell, the first outputs of the computing cells of each column of the matrix being connected respectively to the first inputs of the computing cells of the previous column of the same rows of the matrix, the second outputs of the computing cells of each row of the matrix are connected respectively to the third inputs of the computing cells of the next row of the same 'columns of the matrix, the third outputs of the computational cells of each column of the matrix are connected respectively to the fourth inputs of the computational cells of the subsequent column of those . the same rows of the matrix, the fourth outputs of the computational cells of each row of the matrix are connected respectively to the second inputs, the computational cells of the next row of the previous columns of the matrix, the first output and the fourth input of the computational cell of the least bit of each row of the matrix are interconnected, and the second inputs of the computational cells of the first row of the matrix are connected to the first inputs of the device, the third inputs of the computational cells of the first row of the matrix are connected to the second inputs of the device, characterized in that, for the purpose expansion of the functionality of the matrix computing device by calculating additional functions of the form ZX / 3, 1 / X, (X ^g + Y ² ) / Y, (X-Y) ^y / y additionally introduced η elements of NOT and a second matrix of computational cells, with the first input of the computational cell of the highest order of each row of the first matrix connected to the input of the corresponding element NOT and to the third output of the computational cell of the highest order of the previous row of the second matrix, the output of the elements are NOT connected to the first outputs of the corresponding computational cells of the highest order of the next row of the second matrix, we take the second and third inputs of the computational cells of the first row and the second matrix are connected respectively to the third and fourth inputs of the device 824195 * va, the first input of the computational cell of the highest order of the first row of the first matrix of computational cells is connected to the fifth input of the device, the second inputs of the computational cells of the highest order of each, except the first, the rows of the first and second matrix are connected to the sixth inputs of the device, the second outputs of the computing cells of the last row of the first matrix are connected to the outputs of the device, and the number of rows is equal to the number