SU822195A2 - Device for computing fractional-rational function - Google Patents

Description

one

The invention relates to computing devices for processing information, in particular, devices for solving equations, and can be used, for example, with devices for processing information. In measuring devices, in particular, in two-channel neutron moisture meters that measure the weight humidity of granular materials with variable density.

According to the main author. St. No. 532097 is known. A device for calculating a fractional-rational function, used mainly in dual-channel moisture meters and containing a counter, a group of elements AND, a second counter, a second group of elements AND, a third group of elements AND, two triggers, three elements AND, an element OR, and a driver. The first inputs of the triggers and counters are connected to the first input of the device, the zero output of the first trigger is connected to the first inputs of the first and second elements, And the single output of the second trigger is connected to the second inputs of the first and second elements, And the output of the first element And is connected to the second | the input of the first counter, the output of the second counter through the driver is connected to the second input of the second trigger and is the device output, the third inputs of the first and second elements are the second and third inputs of the device, the outputs of the elements of the first group are connected to the input group of the first counter, the group exits

0 of which through the second group of elements I is connected to the first group of inputs of the second counter, the outputs of the third group of elements I are connected to the second group of inputs of the latter,

5, the output of the second counter is connected to the input of the second group of elements AND, the inputs of the first and third group of elements AND and the second input of the first trigger are connected to the fourth input

0 device, zero output of the second trigger is connected to the first input of the third, element I. The outputs of the first and third elements AND are connected to the inputs of the element OR, the output of which is connected to the input of the second counter. The second input of the third element is the fifth input of the device, the group of inputs of the first and the third group of elements And are the groups of inputs of the device. Two sequences of pulses with a frequency f and fj and a signal with a frequency are received at the device inputs. A frequency signal is defined at the output of the device. It is defined as 1 ch.-2. However, for averaging information. The device changes in discrete and random intervals over time which accumulates the input information over several measurement cycles and averages the information on the exponential law, which significantly complicates the circuit. The purpose of the invention is to increase reliability. This goal is achieved by the fact that in a device for computing a fractional-rational function by author. St. No. 532097, a reversible counter, a timer, an additional counter, an additional group of elements, an additional element, and an additional pulse shaper, the outputs of the higher bits of the reversible counter are connected to the inputs of the elements And an additional group, whose outputs are connected to the group of inputs of an additional pulse counter, output which is the output of the device and is connected to the control inputs of the elements And an additional group and to the input of the additional pulse generator, the output of which is inn with the first input of an additional element And, the output of which is connected to the first input of the reversible pulse counter, the second input of which is connected to the output of the second counter and the timer input whose output is connected to the input. Setting the device O, the input of the additional pulse counter is connected to the second input of the third element I, the second th input of the additional element I is connected to the zero output of the second trigger. The drawing shows a single optic of the possible variants of the circuit solution of the proposed device in combination with the main one (pos. 1). The device contains a reversible counter 2 pulses, a counter 3 pulses, a group of 4 elements And, element And 5 shaper 6 pulse timer 7, counter 8, triggers 9 and 10 counter 11, alemeits And 12 and 13 shaper 14, elemeite I 15, groups 16, 17 and 18 elements AND, element OR 19. The device operates as follows. around In the initial state, the zero signal from the output of the counter 8 of the main device is fed to the counting input. The addition of a reversible counter of 2 pulses and to the input of timer 7, from the output of which the pulse arrives at the input of the installation O of the main device, sets all elements of the main device to the initial state. The zero signal d of the zero output of the trigger 9 is fed to the input of the element I, preventing the passage of the frequency signals f, from the output of the counter 3 pulses to the input. Subtracting the reversible counter 2 impulses 1s. The frequency signal fg goes to the counting input of the counter 3 pulses after filling the counter of pulses 3 into its output appears pulse arriving at the control input of a group of elements And giving permission to overwrite in the counter 3 pulses of the code existing in the high bits of the revs of the counter of 2 pulses. Thus, in the counter of 3 pulses, the conversion of the some code 2 in the high bits of counter 2 to the frequency signal f gji / defined by the formula f out N is constantly going on with the arrival of the first signal, the start of the first cycle of operation. When the Start signal arrives, trigger 10 is set, in 1, and in counters 11 and 8, the coefficients K and K2 are recorded, respectively (K is recorded in the forward or reverse code, Kj - in the reverse). The pulse sequences with the frequency fI and f2 are received, respectively, at the inputs of the elements 12 and 13. Since the inputs are these elements. This is all, the sequence of pulses with frequency f is fed to the input of counter 11, and the sequence of pulses with frequency is fed to the input of counter 8. A necessary condition for the operation of the main device is E7 f where I is the time of the counter 11 ;. tj2 is the filling time of the counter 8. Wherein C J. "I 1.l" -X 2 where t "is the filling time of the counter 11 when K is written in the reverse code; the filling time of the counter 8, when K 3 is recorded in the forward code. "Y. Xa - "- K-, T 4iPI, 1 2 1 After the pre-formation ii l Liil ii liHi ia × Thus, counter 8 is filled in with time). For this, in code 11, the code H. (l ,,) is formed. 2. where n is the number of bits of the counter 1 After the counter 8 is filled, an impulse appears at its output, which enters the input of the timer 7 and starts it. The same pulse arrives at the control input of a group of 16 elements And, and gives permission to overwrite N code received in counter 11 into counter 8. This same pulse from counter 11 enters through shaper 14 to the second trigger 9 and sets it to At the second outputs of the elements And 12 and 13, the prohibition signal O appears, and at the second input of the electronic terminal 15, a signal is allowed to go walking with a frequency .f (j to the counter 8, in which the conversion of the received code II into the counter begins. frequency signal. The sensor 8 and at the input of the main device is determined by the formula 4.B.N (G, - Frequency signal f from the output of the meter. 8 is fed to the counting input. Addition of a reversible pulse counter 2. At the same time from the zero output of the trigger 9 i It enters the input of the I5 element, allowing the passage of the frequency signal from the pulse output counter 3 to the counting input Reading counter pulse counter 2. In a reverse counter 2 pulses, the pulses are added at a frequency f and the pulses are subtracted. Thus, in the high bits of the reverse counter. 2 pulses at each moment of time t (with it-f t-te) The code N is formed, paBHbfe N (t) N (tl) + + tf-feb "x (t- -t if f fewx or N" (t ) N4 (tl) {f B, .-, if f 0. In the general case, N (t) N (tl) ± (f-f8MUt-i1) ъ where N (t) is the value of the code formed in the higher bits reversible counter for 2 pulses at kgikdy time t; .N (t-.l) is the code value that is formed in the old bits of the counter 2 pulses at the previous time (t-1); frequency at the output of the main device (at the output of the counter 8) f VKKI frequency at the output of the counter 3 at each time (t - 1). Code Nf (t) at each time point At tо j is counted into a counter of -3 pulses and is converted into a frequency sigigs M defined as, - out, u-ot f ° ieb.Mt ..) t, This expression can be expressed as: output output. ) where ffrt, u) is the current value of the frequency signal and the output of counter 3; K - coefficient of proportionality, equal to t; f is the value of the frequency signal at the output of the counter 8. As can be seen from the formula, this depends. The bridge reflects the averaging law of information and has the form of an exponent. After some time T, the timer 7 generates a pulse, & stupid to the input Installation O, In this case all the elements of the main device circuit are reset. The zero signal from the zero output of the trigger 9 is fed to the input of the element I, prohibiting the passage of frequency signals from the output of the even 3 to the counting input Subtraction ije. reversing counter 2. Thus, in the first cycle of operation of the device in the reversible meter 2 pulses, code 4 is obtained equal to. ; (4) -% de - code present in the higher bits of the reversing counter 2 before the start of the device operation cycle, which is permanently converted into an astho signal f equal to 4 –ii outputs N. m 4-1 4 tons and lu V kj 4 Г гвЫх1 de f, the frequency signal at the output of the pulse counter 3 at the end of the first cycle of operation of the device; -frequency signal at the output of the counter 3 pulses before the start of the first cycle of the device. , With the arrival of the next pulse, the second cycle of operation of the device begins, and the condition t T must be fulfilled, where 1 c is the time interval between the Start, T signals, is the timer (device) operation time. The device works in a similar way in each work cycle, i.e. output information (f) is averaged exponentially. The integration speed depends on the time T of the timer 7. In this case, if timer 7 generates a pulse with duration T equal to unity, then in the first cycle of operation of the device in counter 2, the code S is equal to code N received in counter 11, exactly N; N lf-fBb ,, l N, +, if or NJ ,, - iVT - NI- () N, where i; T N-iBb x-T Ni. The code N N is rewritten into counter 3 and is converted into a frequency signal f, equal to the signal f, ir, to about 8 1 1 N; . N Thus, the averaging of the output information according to the exponential law occurs in the first cycle. In this case, if timer 7 triggers a pulse with duration T equal to 1/2 T, then in the first cycle of operation of the device in counter 3 a code is generated equal to

-L-i

N-M

n ..

which is converted to a frequency signal.

, i in OUT vi

lb :; Ns,

In the second cycle of operation of the device, namely, with the arrival of the next signal. Start, in the higher bits of counter 2, the code N is formed, equal to

Nl.N.t,

 one

which is converted to a frequency signal

1 °.

i

.

Nl n44llii

OUT 1

2

In the third cycle of operation of the device, in the higher bits of the counter, an code N J is formed, equal to

.

converted to frequency definable as

i

Bbu

m In the n-th cycle of the device operation, the 2. Thus, the frequency signal f at the output of counter 3 and at the output of the device in each cycle of operation increases or decreases by a certain amount, determined by the difference between the codes N and N, obtained respectively in counter 11 both in the higher bits of counter 2, and the duration of the pulse T produced by timer 7, and exponentially approaches the value of the frequency signal f. In the general case, when the pulse duration is T -, the frequency signal at the output of the device fgyx is defined as

Claims (1)

The claims ι A device for calculating a fractional rational function according to ed. St., No. 532097, characterized in that, in order to increase reliability, a reverse counter, a timer, an additional counter, an additional group of elements And, an additional element And and an additional pulse shaper are introduced into it, and the outputs of the upper bits of the reverse counter are connected to the inputs of the elements And additional group, the outputs of which are connected to the group of inputs of the additional pulse counter, the output of which is the output of the device and connected to the control inputs of the elements of the additional group and with house of an additional pulse shaper, the output of which is connected to the first input of the additional element And, the output of which is connected to the 'first input of a reversible pulse counter, the second input of which is connected to the output of the second counter and to the timer input, the output of which is connected to the input' 'Setting 0' ' device, the input of the additional pulse counter is connected to the second input of the third element And, the second input of the additional element And is connected to the zero output of the second trigger.