SU817705A1 - Multiplying device - Google Patents

Description

(54) MULTIPLE DEVICE

I

The invention relates to computing and can be used as a multiplication unit in digital computers, as well as in digital monitoring and control systems.

A multiplying device is known that contains multirank pyramidally-connected adders, p-bit registers of multiplicand, multiplier and product divided into n / g groups of bits (where g is the number of bits in a group), decoders, (n / g) multiplying devices by n / g in each group.

The outputs of the bits of each group of multiplicable and multiplier registers are connected to the inputs of the corresponding decoder, the first inputs of all multiplying devices of each group, starting with the lower one, are connected to the outputs of the decoder of their group, / the second inputs of each multiplying device of each group are connected to the outputs of the corresponding g-bit groups of the register of the multiplicand, the outputs of all the multiplying devices of each group are connected to the inputs of the corresponding adders of the first rank, and the outputs of the last rank accumulator - to the inputs Registers product of 1J .. However construct pyramidal structure leads to considerable complication of the device. In addition, non-uniform elements are used in the device, which complicates its operation, the multiplication takes place in the forward code, i.e. The device is applicable for multiplying only to positive numbers.

It is also known a multiplying device, in which multiplication is performed in an additional code, i.e. 5, applicable for multiplying both positive and negative numbers, is constructed according to the type of matrix from a series of zero total adders into a row and m – 1 of AND elements, the outputs of which are connected to the inputs of the corresponding adders. In addition, the device contains input and output corrective circuits. The outputs of the input corrective circuit intended for spec.

5 of the special conversion of input signals into new binary variables is connected to the corresponding inputs of the AND elements, and the outputs of the fifth row adders - to the inputs of the output correction circuit, which is converted

This is the product of the factors in the additional code.

T-device, in contrast to that previously described, is built on homogeneous elements pj,

The disadvantage of the device is the complexity of its design due to the presence of input and output corrective circuits containing a set of cells. AND, OR, EXCLUSIVE OR.

The closest to the present invention is a matrix-type multiplying device consisting of strands of m cells, each of which contains a transfer forming unit, an modulo-two adder, and an element, with the first input of the transfer forming unit of each k-th cell J the th row (j 1, ..,; n; k t l, ... rm) is connected to the first modulo-two input of the same cell and the modulo-two output of the (kl) -th cell (jl) - ro bit, the second input of the transfer formation formation node of each k-th cell of the j-th row with the second input modulo two of the same cell with the output of the transfer forming unit () -th cell j-ro row, the third input of the transfer formation unit of each k-th cell j-G, the order with the first input of the element And the same cell and with the third inputs of the transfer forming units of all cells j-ro p yes, the third input of the adder modulo two of each k-th cell, j-ro p yes - with the output of the element And the same cell. In addition, each k-cell of the j-ro row of a known device contains an additional modulo-two adder, the output of which is connected to the second. eye input element And and the fourth input of the node forming the transfer of the same cell. The first input of the additional adder modulo two of each k-th cell j-ro p is connected by the first inputs of additional adders of all cells of each j-ro pk, and the second pass of the additional adder modulo two of each cell of the first row is with the second inputs additional adders modulo two corresponding successive rows to the n-th row.

Such a device is built on homogeneous cells.

However, each of the cells of this device contains a large number of cell constituent elements, which complicates the device as a whole.

The purpose of the invention is to progres the device.

The goal is achieved by the fact that in a duplicating device consisting of a series of m cells, each of which contains a transfer forming unit, an adder of two units and an AND element, with the first input of the forming unit each

The k-th cell j-r yes and is connected to the first input of the adder modulo two of the same cell and with the output of the adder modulo two (kl) of the cell (jl) -ro row, the second input of the transfer forming unit of each k-th j-ro cells r yes - with the second input of the adder modulo two of the same cell and with the output of the transfer forming unit (k + 1) -th cell j-ro r yes, the third input of the transfer forming unit of each k-th cell j- ro row yes - with the first input of the element And of the same cell and with the third inputs of the nodes forming the transfer of all cells j-ro r yes, the third input of the modulo two each k-th cell j-ro yes connected to the output of the element And the same cell, into each k-th cell of the n-th row yes entered the element NOT, the output of which is connected to the second 4 input element And the same cell, the second input element AND each k-th cell of the first row of the device is connected directly to the second inputs of the elements AND the k-th cells of the subsequent rows, except for the p-th row and with the output of the element NOT the k-th cell of the n-th row, and the output of the element And each cell j-ro r yes - with the fourth input of the node forming the transfer of the same cell.

FIG. 1 shows the structural scheme of the proposed multiplying device; in fig. 2 is a functional diagram of an elementary cell of the first type, fig. 3 is a functional diagram of an elementary cell of the second type (nth row).

The device contains m (n-1) slats 1, of which all rows of the device are made, except for the n-th row and m cells 2, of which the n-th row of devices is made. - Cells 1 and 2 contain a transfer unit 3, an adder 4 modulo two and an AND 5 element; cells 2, in addition to the indicated elements, contain an HE element 6.

The first input of the node 3 of the formation of the transfer of each k-th cell of the j-ro row is connected to the first input of the adder 4 modulo two of the same cell and with the output of the adder 4 modulo two (k-1) -th cell (jl) -ro row, the second input of node 3 - with the second input of the adder 4 modulo two of the same receipt and with the output of the node 3 forming the rank (k + 1) -th cell j-ro p yes, the third input of node 3 - with the first input of the AND element 5 of the same cell and with the third inputs of the nodes 3 forming the transfer of all the cells j-ro row, the fourth input of the node the 3rd third input of the adder 4 modulo two and with the output of the element And 5 the second cell, the second input of the element And 5 of each k-th cell of the first row of the device is connected to the second inputs of the elements And the 5th k-th cells of the next rows except the fifth row and with the input of the element HE 6 of the k-th cell Yes, the output of the element is NOT 6 of each k-th cell of the n-th row, with the second input of the element AND 5 of the same cell. The first input of the transfer formation unit 3 is every first in the series, except for the 1st row of a cell connected to the second input of the AND element 5 of the same cell, the second input of the transfer formation unit 3 is the second one in the pth row cells with the third entrance of the node 3 to form the transfer of the same cell. The device works as follows. At the first input of the element. And the 5 first cells of each j-oro row are signals corresponding to the values of the multiples of the multiplier, while the first input of the AND 5 element of the first cell of the 5th row is given a signal corresponding to the sign of the sign of the second input of the AND 5 element each k-th cell of the first row of the device receives signals corresponding to the multiplicative bit values, while the second input of the And 5 element of the first cell of the first row is given a signal corresponding to the value of the digit of the bit. To the first input of the node 3 of forming the transfer of each k.th cell of the first row and to the second input of the node 3 of forming the transfer of the mth cell in each jth row, except for the nth p and cell, a signal is given, with a corresponding logical O The multiplication process starts with the least significant bit. In the J-OM p d there is a multiplication of one of the bits of the multiplier for all the digits of the multiplicand. Upon receipt at the first input of the element And 5 of any k-th cell j-oro a number of signals corresponding to some bit of the multiplier Y j, and to the second input of the element And 5 - a signal corresponding to some bit of the multiplicand X, at the output of the element -I 5, a signal is obtained that corresponds to their Hts product, which is fed to the third input of the adder 4 modulo two and the fourth input of the transfer formation unit 3. At the first input of the transfer shaping unit 3 and at the first input of the adder 4 modulo two, a signal is received corresponding to the sum of partial products from the (k-1) -th cell {j-1) -ro row, to the second input of the transfer shaping unit 3 and to the second input of the adder 4 modulo two transfer signal, formed in the node 3 forming the transfer of the {k + 1) -th cell j-ro p da. In the adder of the 4th k-th cell of the j-ro row, a signal is generated corresponding to the sum of the partial products of this cell, taking into account the sum of the partial products of the previous rows, which is transmitted to the input of adder 4 modulo two (k + 1) -th cell ( j + l) -th row, in node 3 of the formation of the transfer of the k-th cell, a transfer signal, which is transmitted to the second input of the node 3 of the transfer formation (k-1) -th cell. To correctly determine the sign of the product, the nth row of the device is used. If the multiplier is a positive number, then the signal corresponding to the sign bit of the multiplier is zero at the first input of the And 5 element of each kth cell of the nth row the signal is equal to zero, and at the output of adder 4 modulo two of these cells, a signal is produced that corresponds to the sum of the partial products of the (k-1) -th cell (nl) -ro number. If the multiplier is a negative number, then the signal corresponding to the significant bit of the multiplier is one. The signal corresponding to the multiplica section is fed to the input of the inverter 6 of each k-zO. the cells of the row where it is inverted, and at the outputs of the elements AND 5 of the 5th cells of the p-th row receive a signal corresponding to the reverse code of the multiplicand. The second input of the adder 4 modulo two t-th cell of the p-th row is given a signal corresponding to 1, which is transmitted to the second inputs of the adder 4 modulo two of all the k-th cells of the p-th row. This corresponds to the conversion of an obratnogo code into an additional one, as a result of which all adders 4 modulo two k-th cells of the p-th row form a signal corresponding to the sums of partial products of (k-1) -sx cells (nl) -oro with additional code MULTIPLE. Thus, the proposed device simplifies the known multiplying device, thereby improving the reliability of its operation, uproar. exploitation. Formula. the invention. A multiplying device consisting of a series of m cells each, each of which contains a transfer forming unit, an modulo-two adder, and an element, the first input of the transfer forming unit of each k-th j-oro cell connected to the first input adder modulo two of the same cell and with the output of the adder two odd two (kl) -th cell (j-1j-ro yes, the second input of the transfer unit for each k-th cell j-ro and connected to the second input sum cipa module two of the same cell and the output of the transfer forming unit () -p cells of the j-ro row, third. The transfer of each k-th cell j-ro p da is connected to the first input of the element AND the same cell and to the third entrances of the knot to form the transfer of all j-ro cells, the third input of the adder modulo two of each k-th cell j -ro row is connected to the output of the element AND of the same cell, characterized in that, in order to simplify the device, an element is NOT entered into each k-th cell of the 5th row, the output of which is connected to the second input of the element of the same cell, the second input element AND each k-th cell of the first row of the device is connected directly to the second input The signals of the elements and k-th cells of the next rows, except for the p-th row, and with the input of the item NOT the k-th cell of the th-th row, and the output of the element AND of each cell j-r and yes are connected to the fourth input of the transfer forming unit of the same cell. Sources of information taken into account during the examination. 1. USSR author's certificate 487388, cl. G 06 F 7/52, 1974. 2. ilEEE Transactions on Computezs, October, 1975, p. 1025. 3. Radio and Electronls Engineer, January, 1974, p. 19 (prototype). 0Y ", .. 0U",. 2 0 0) (m-3, 1 t-t-d

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Claims (3)

Formula inventions A multiplier device consisting of n rows of m cells, each of which contains a transfer formation unit, an adder modulo two and an AND element, while the first input of the transfer formation unit of each kth cell of the j-oro row is connected to the first input the adder modulo two of the same cell and with the adder output modulo two (k-1) -th cell (j-lj-th row, the second input of the transfer formation unit of each k-th cell of the j-ro row is connected to the second input of the adder modulo two of the same cell and with the output of the transfer formation unit. (to + 1) -th cell of the J-ro row, tre the input of the transfer formation node of each kth cell of the jth row is connected to the first input of the element of the same cell and the third inputs of the transfer formation nodes of all cells of the jth row, the third adder modulo two of each k the jth cell of the jth row is connected to the output of the And cell of the same cell, characterized in that, in order to simplify the device, an HE element is introduced into each kth cell of the ηth row, the output of which is connected to the second input of the And cell of the same cell, the second input of the element And each k-th cell of the first row of the device is connected directly venno to second inputs of the AND k-th cell subsequent rows except Χζ "-2 About No. 487388 2. t e z s ” 3. Ut-G of the ηth row and with the input of the element NOT of the nth cell of the ηth row, and the output of the And element of each cell of the jth row is connected to the fourth input of the transfer formation unit of the same cell.