SU811256A1 - Multichannel priority device - Google Patents

Description

AND elements, OR element, NOT element, and in each channel there are two triggers, four AND elements, OR element, IE element, the device clock input connected to the nerve inputs of the extinguishing and synchronizing AND elements and the inputs of the NOT channels, single outputs the first channel triggers through the OR element are connected to the second input of the AND synchronizing element, and to the second input of the extinguishing element AND through the NOT element, the output of the AND synchronization element is connected to the first inputs of the first and second AND elements of the first channel ala, the output of the damping element AND is connected to the first inputs of the OR elements of the channels and to the damping output of the device, the output of the second element AND of the channel is connected to the second input of the OR element of the channel and to the first inputs of the first and second elements AND of the subsequent channel, the output of the first element AND of the channel connected to the single input of the second channel trigger and with the corresponding enabling output of the device, the output of the channel NOT element is connected to the first inputs of the third and fourth elements of the channel, the second inputs of the third and fourth elements The terminals are connected to the zero and single outputs of the second channel trigger, single and zero inputs, the single and zero outputs of the first channel trigger are connected to the third, fourth and second inputs of the first and second channel elements, respectively, and the request inputs of the device are connected to the third inputs of the third elements And the corresponding channels are entered into each channel blocking element AND and the additional element is NOT. Each request input device through an additional element of the channel is connected to the first input of the blocking element AND channel, the second input and output of which are connected respectively to the output of the element OR channel and to the zero input of the second channel trigger.

The block diagram of the device is shown in the drawing.

The multichannel priority device contains in each channel triggers 1, 2, elements AND 3-6, elements OR 7, elements NOT 8, 9, blocking element AND 10. These elements form channels 11-13. In addition, the device contains the element NOT 14, the element OR 15, the suppressing element AND 16, the synchronizing element AND 17. The device has a clock input 18, query inputs 19-21, enabling outputs 22-24 and a clock output 25.

The device works as follows.

In the initial state, the corresponding potentials from the outputs of the flip-flops 1 in all

Channels 11-13 of the device are prepared for opening of the AND 4 elements and closed of the AND 3 elements, and the potentials coming from the element OR 15 and the HE 14 element are prepared for opening by the element AND 16 and the closed element And 17. In addition, the potential coming from the additional element NO 9, prepared for opening the blocking element And 10.

From the input 18, the synchronization pulses go to the inputs of the AND 16, 17 elements and NOT 8. From the output of the AND 16 element, the synchronization pulses through the elements OR 7 and the elements AND 10 arrive at

reset of the flip-flops 2 and are output as synchronization pulses to the output 25, connected to the input 18 of the next channel group 11-13. Upon admission to the input of 19 one of

And -13 channels of a single pulse with a duration longer than the period of following the synchronization pulses, and a pause (up to t synchronization pulse or after it) through the And 5 element is recorded as input

impulse to trigger 1, element 3 is prepared for opening, and element 4 is closed. And element 10 is closed at the same time until the end of the request impulse.

In addition, with the aid of the element OR 15 and the element NOT 14, the element AND 16 is closed and the element AND 17 is prepared for opening. Another synchronization pulse through

the element And 17 and the element 3 prepared for the opening is fed to the input of the corresponding trigger 2, sets it to a single state and is output to output 22. The trigger 2 is its potential

closes the AND 5 element and prepares the AND 6 element for opening. During the pause time, trigger 1 returns to the initial state. If during the service the request does not

other requests have been received on inputs 20, 21, then element 17 is closed and element 16 is being prepared for opening. However, the following synchronization pulses will not return trigger 2 to its original state until the input impulse ends and the element is opened. 10. This excludes the possibility of generating several output pulses per request pulse. Upon termination of the input pulse, the next synchronization pulse through the elements OR 7 and AND 10 will return trigger 2 to the initial state. In the event that another request is received during the service of the request, the state of the AND 16, 17 elements does not change and the flip-flop 2 is reset from the output of the AND 4 element through the OR 7 and AND 10 elements by the next sync pulse

termination of the input pulse.

Thus, at the time of the input pulse, the element 10 is closed, preventing the trigger 2 from being set to the zero state and bringing the circuit to the initial state, which increases the reliability of the device.

Claims (2)

1. USSR author's certificate N ° 363977, cl. G 06 F 9/18, 1972. 2. USSR author's certificate in application number 2445618 / 18-24, G 06 F 9/18, 26.01.77, 1977 (prototype). .22 nineteen