SU780183A1 - Method of conting voltage into binary code - Google Patents

Description

; 5 4) METHOD FOR CONVERSING VOLTAGE TO BINARY CODE

one

The invention relates to the field of computing and can be used for converting voltage into binary code / telemetry and automatic control and management systems.

A known method of converting voltage into a binary code with a direct reduction of the count, in which the voltage to be converted is simultaneously compared with a set of higher discharge standards, the difference between the measured voltage and the reference of the older discharge standard is found and produced comparison of the obtained difference with a set of standards of a smaller LC size.

The disadvantage of the method is the relatively large conversion time associated with comparing the measured voltage with a set of standards for the separation of the higher bit, finding the difference between the measured and the voltage of the high standard of the discharge and repeated iteration of the above operations for the selection of the lower bits.

There is also a known method of converting voltage into a binary code by simultaneously comparing the voltage to be converted with a set of reference voltages across the quantization levels, with the voltage of the first standard being equal to a unit value and corresponding to a zero weight of base degree two 2

The disadvantage of this method is the ambiguity of the result in the formation

fO variable voltage and a large number of transformation operations.,

The purpose of the present invention is to eliminate the ambiguity of converting voltage to code and improving speed.

15

The goal is achieved in that in the method of converting a voltage into a binary code by simultaneously comparing the voltage to be converted with a set of reference voltages

20, according to the quantization levels, the pulses of a single code equal in weight to the corresponding reference voltages m are distributed into code combinations according to the bits of the binary code

25 by law:

C a Char-o,

thirty

de I. -HoWep binary code pulse, - 1,2,3, .. number of code combination, And - 1,2,3 ... number of reference

 stress

impulse voltages in code commins with maximum magnitude are simultaneously compared between

They also separate the difference between the maximum pulse voltages in the code combinations corresponding to the lower bits and the maximum pulse voltages of the code combinations corresponding to the higher bits.

The method is implemented in a device whose functional electrical circuit is shown in the drawing.

A circuit of resistors 1-7 creates a plurality of voltage standards, which are taken from midpoints and fed to the upper inputs of the comparators 814. At the lower inputs of the comparators, a measured voltage is applied, for example, equal to 6.3 volts. When the voltage at the lower input of the comparator is larger than at the upper input, a voltage appears at its output. From the outputs of the comparators, the voltage is supplied ri and the inputs of the threshold devices 1521, where it is formed and; Before the voltage of the standard, ifeofot be fed to the appropriate comparator.

From the outputs of the threshold devices. 1521 reference voltages of the RVS on the code combinations and are fed to the inputs of the comparison elements.

Yapr etalons 22-24 ;.

In this example, the code combinations K will contain pulses (standards) with numbers 1.3-5.7,,; . Comparison elements 22-24 compare the pulses with each other in each code combination and identify pulses (standards) in the peso. are fed to the inputs of the elements 25-27 comparing the largest by weight standards (pulses). At the output of the comparison elements of the largest pulses, a binary code is generated which is equivalent to

INPUT signal. Low-order bits are allocated when the voltage of the most powerful Impulse in the code pattern corresponding to the low-order bit is greater in magnitude of the voltages, separately YES :; Impact of pulse 4 in higher-order bit combinations.

In the case under consideration, for the first discharge, the weight of the determining pulse (standard) is 7 and it is greater than the other determining pulses (standards) 6 and 4, corresponding to more than: senior discharge, therefore in the whole

element 27 is allocated the first bit. For the second bit, the weight of the determined pulse is 6 and it is greater than the weight of the determining pulse of the most significant bit, 4, therefore, the second bit is selected at the output of element 26.

The high bit is generated when there is a determining pulse in the high-order code combination. At the output of element 25, a third bit is allocated.

If the maximum reference voltage is 6.26, then the unit reference value corresponding to the first discharge is 0.885 V. When converting a voltage equal to 6.3 V, we have a 3-digit code III, corresponding to 7 weight units, or 7 x, 0.885 6.1956 6.2 V. The conversion error will not exceed the quantization step.

Claims (2)

1.Smolov V.B. et al. Semiconductor encoding and decoding voltage converters, L., Energie, 1967, p. 147. 2. Ed. Petrova G.M. Information converters in analog-digital devices and systems .. M., Mashinostroenie, 1973, p. 179-184 5, (prototype),