SU780027A1 - Trainer for operator - Google Patents

Description

(54) OPERATOR SIMULATOR

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The invention relates to simulators and can be used to train operators.

A known operator simulator comprising a control unit connected to an information presentation unit and a command generation unit, one of the outputs of which is connected to the memory unit through a switching unit, and an error recording unit l.

A disadvantage of the known simulator is the low effectiveness of the training.

The aim of the invention is to increase the effectiveness of training.

The goal is achieved by the fact that the simulator has a block for registering the number of intermediate digits, a comparison circuit, and the memory node consists of blocks of memory, a first digit and the next digit, while the inputs of the block for recording the number of intermediate digits are connected to the outputs of the control block, the command generation unit and the error recording node, and one output of the switching unit directly and through the memory block of the first digit are connected to the inputs of the comparison circuit, the output of which is connected to one of the E2LOIIOB information presentation node.

moreover, one of the inputs of the error recording block through the memory block of the next digit is connected to another output of the switching unit.

5 In addition, the block of registration of the number of intermediate digits contains the resolution scheme, the counter of intermediate figures, the decoder and the display board, while the output of the control unit is connected to the input of the resolution circuit, the output of which, through the serially connected counter of intermediate figures, the decoder is connected to one input of the display board, another input is associated with the output of the error recording node.

The drawing is a block diagram of the operator’s simulator.

The operator’s simulator contains a block

20 1 control intended for

turning off the device, changing the probability of occurrence at the beginning of a series of a certain digit, one output of which is connected to information presentation unit 2, consisting of series 3 random events sensor, decoder 4 and digital display 5, and the other output is connected to block 6 input team building

30 one output of which is connected to a block of 7 registration of the number of intermediate digits containing a serially connected resolution circuit 8, a counter 9 intermediate digits, a decoder 10 and a board 11 indicating the number of intermediate digits, another output connected to the control input of the switching unit 12, the other input of which is connected with the output of the sensor 3 random events, the first output is connected to the input of the memory block 13 of the first digit, the output of which is connected to one input of the comparison circuit 14, the other input of which is connected to the third output of the switching unit 12 The second output of which is connected to the input of the memory block 15 of the following digit, the output of which is connected to the input of the comparison circuit 16 of the error recording unit 17, consisting of a series-connected operator console 18 and an encoder 19 connected to the comparison circuit 16, the output of which is connected to a banner 20 error indications, the second output of the operator console 18 is connected to the display 11 indicating the number of intermediate figures, and the output of the comparison circuit 14 is connected to the sound alarm unit 21 and to the control unit 1, the third output of which is connected to the control input 8 resolution.

The information presentation node has a sensor 3 random events, a decoder 4, a digital display 5 and an audible signaling unit 21.

The memory node contains a block 13 of memory P (the first digit and block 15 of the memory of the next digit.

The error recording node 17 has a comparison circuit 16, an operator console 18, an encoder 19, and an error indication banner 20.

The simulator works as follows.

For training the features of the operator's short-term memory, the so-called probe method is used.

The operator is presented with a random number of digits (e.g., 8 digits) for storing. Moreover, the last digit has already met the operator before, among the first three or four digits. This digit is used as a probe. The operator should remember the number that immediately followed the first presentation of the digital probe. In this case, the dependence of the number of correct answers on the number of qi between the first and second probe-digit presentations, which can be considered as interfering units, is analyzed.

At the control unit 1, the probability of occurrence of a series of a certain digit and including a simulator is established. On the block b, the formation of teams set

The number of the digit to be used as a digital probe. The signals from the control unit 1 are fed to the input of the sensor 3 of random events from the output of which the cutter decoder 4 is on board 5, where these random numbers are displayed.

Depending on what sequence number was set on block 6, the formation of commands, c, this

the block enters the switching unit 12, a signal through which the switch connects the block 13 of the memory of the first digit — 1 yes to the output of the sensor 3 random events. In addition, in block 13

A memory probe is recorded (e.g. 4). Then, from the command generation unit B, the next signal is sent to the switching unit 12, by which the switching unit 12 connects to the sensor output 3 random events the memory unit 15, into which the digit following the probe digit is written. According to the next signal from block b, the formation of commands on the switching unit 12, the last, all

subsequent random numbers from the sensor 3 random events are fed to the comparison circuit 14. Simultaneously, the signal from the block b formation of commands in the block 7 registration number

intermediate figures opens the resolution scheme 8, through which with a block. When 1 control is sent to the counter 9 intermediate digits, the counting pulses arrive, corresponding to the digits presented to the operator. From counter 9 through the decoder 10 converted. . impulses are received on the scoreboard 11 indicating the number of intermediate figures.

Upon receipt of the digit-probe comparison circuit 14, a signal appears at its output indicating that the second digit-probe was presented to the test subject. This. the signal arrives simultaneously at the control unit 1, which stops the presentation of a sequence of numbers to the operator, and at the sound alarm unit 21, which notifies the operator with a sound signal that he has been given

numbers - probe.

The operator must add the number following the first presentation of the digital probe and dial it on the remote control 18 of the error register 17

side.

The dialed digit on the console 18 through the decoder 19 enters the comparison circuit 16, where it is compared with the actual digit received from the memory block 15 of the next digit (next to the probe number). If the answer is incorrect, then the signal from the output of the circuit 16 of the comparison includes a banner 20 of the error indication. In this case

dialing the answer on the remote control 18, the numbers 11 of the intermediate numbers are displayed on the board 11. If the transparency 20 does not light up after dialing the number on the remote control 18, the answer is correct.

Then the operator is presented with a new series of numbers, while the operation of the simulator is similar to that described.

The use of the simulator will allow to increase the efficiency of the operator’s memory training under the conditions of interfering interference, to improve the quality of operator training.

Claims (2)

1. An operator simulator containing a control unit connected to the information presentation unit and the command generation unit, one of the outputs of which is connected to the memory unit through the switching unit, and an error recording unit, characterized in that It has a block for registering the number of intermediate digits, a comparison circuit, and the PS1m ty node consists of memory blocks of the first digit and next digit, with the block inputs registering the number of intermediate digits are associated with the outputs of the control unit, the command generation unit and the error recording unit, and one outputs of the switching unit directly and through the memory block of the first digit are connected to the inputs of the comparison circuit whose output is connected to one of the inputs of the information appearance unit , with ONE: from the inputs of the error recording block through the memory block of the next digit connected to another output of the switching unit. 2. The simulator pop. 1 is also distinguished by the fact that the block of registration of the number of intermediate figures contains 5, the resolution scheme, the intermediate digit counter, the decoder and the display board, and the output of the control unit is connected to the input of the resolution circuit, the output of which is connected through the serially connected counter 0 intermediate digits, the decoder is connected to one input of the display panel, the other input of which is connected with the output of the registration unit from the beep. five Sources of information taken into account in the examination 1. USSR author's certificate in application number 2565406 / 28-12, cl. G 09 B 9/00, 1978.