SU779902A1 - Phase meter - Google Patents

Description

(Sl) PHASOMETER

one

The invention relates to the field of phase-measuring technology and can be used to improve the accuracy and noise immunity of phase meters.

1 a phase meter is known that contains two shaping devices, to the outputs of which two extenders and two coincidence circuits are connected, two triggers connected by one output to the output of the coincidence circuit of the corresponding channels, and the second to the output of the coincidence circuit output, and two keys , generator and circuit OR II.

The disadvantage of the known Phase Meter is low accuracy.

A phase meter is known, which contains a puller at the time of transitions of the voltages under study through zero values, a reference frequency generator, an electronic key with a recording device at the output, a frequency multiplier and two devices for extracting the transition moments of the voltages under study through maximum values, each of which is made up of control triggers, dividing trigger by two, control gates and reversible counter 2} .30

The disadvantage of the phase meter is the presence of failures with a variable component of the disturbance causing double transitions of the input signal through the zero level.

The aim of the invention is to improve the accuracy and noise immunity.

The goal is achieved by the fact that in a phase meter containing the first and second device for selecting the moments of transition through the maximum value and the generator, the outputs of which are connected respectively to the inputs of the resolver, and the generator is connected to the inputs of the device for selecting the moments of transition through the maximum value, the selection device the moments of transition through the maximum value are provided with the first, second, third, fourth and fifth keys, an inverter, a limiter amplifier, the first and second triggers, controlling rigger, coupler, an OR, a counter adding, subtracting counter, the delay element and the recording element, the output of limiting amplifier is connected to one of the inputs of the first and third keys, and through an inverter to the first input element and GI one of

the inputs of the second and fifth keys, the second inputs of the second and third keys are connected to one of the inputs of the recording element, the output of the subtraction counter and through the delay element to the second input of the fifth key, the output of which is connected to one of the inputs of the counter Olive, the output of which is connected through the element records to one of the inputs of the subtraction counter, the second input is “costly connected to the output of the OR element, the first and second. The inputs of which are connected respectively to the outputs of the ZI element and the fourth key, the second input of the first key through the first The first trigger is connected to the second input of the ZI element, the third input of which is connected to one of the control trigger outputs, the second output of which is connected to one of the inputs of the fourth key, the other input of which is connected to the output of the first key and through the second trigger of the second / counter input. addition, the output of the second and third keys are connected respectively to the first and second inputs of the control trigger, while the phase meter inputs are the inputs of the limiting amplifiers, the input of the device for selecting the moments of transition through the maximum The value is the input of the first trigger, and the output is the second output of the control trigger. ,

FIG. 1 shows a functional diagram of the phase meter; in fig. 2 - time diagrams explaining its principle of operation for the case of an undistorted sinusoidal signal; in fig. 3 time diagrams of the steady state for the case when the signal is distorted by the variable component of the interference.

The phase meter contains the first and second devices 1 and 2 for extracting the moments of transitions of the investigated stresses through maximum values, the generator 3 and the resolver 4.

Each of the devices for selecting the moments of transition through the maximum value contains the amplifier-limiter 5, the inverter 6, the first, second, third, fourth, and fifth keys 7, 8, 9, 10, 11, the first and second triggers 12 and 13, the control trigger 14 , ZI element 15, OR element 16, delay element 17, addition counter 18, recording element 19, subtraction counter 20

The device works as follows.

In the initial state, with 1 the addition counter is set to zero, and the K number is recorded in the subtraction counter. When the signal is fed (Fig. 2a) to the input of the limiting amplifier 5, rectangular pulses appear at its output (Fig. ) the same frequency. During the positive half-period of the signal under study, the signal is pulsed with the frequency f / 2 from generator 3 via key 7, the second

the trigger 13 is fed to the input of the addition counter 18 (Fig. 2b), and the pulses of frequency f from the generator 3 through the keys 7 10 and the OR 16 element are fed to the counted input of the subtraction counter 20 (Fig. 2e) at the beginning of the positive half-period.,.,, .

As soon as K impulses arrive at the input of the subtraction counter, the number is equal to zero, and at the output, a positive polarity pulse is produced, which through record element 19 overrides the number from the counter to / 2 into the subtraction counter, since impulses through the second trigger 13, divided by two. At the same time, the output impulse from the subtraction counter 20 through the key 9 sets the control trigger 14 to O, thus closes the key 10 itself and stops the flow of pulses from the generator 3 to the input of the subtraction counter 20 (FIG. 2d), and continues to the impulse 18 the end of the positive half period (fige).

With the onset of a negative half-cycle, pulses of frequency f / 2 from generator 3 through the first trigger 12, element 15 and element ID 16 begin to flow to the input of the subtraction counter (FIG. 2d, g). As soon as they pass a number equal to K / 2, in the counter The subtraction will be set to O, and the output impulse from one side will write over the recording element 19 to the subtraction counter the number accumulated in the addition counter 18 in the previous positive half period, on the other hand the key 8 will set the control trigger 14 to 1, closing this element ZI 15 and stopping The pulse is fed to the input of the subtraction counter 20, and through the delay element 17. and the key 11, the same impulse will reset the addition counter 18 to O and O will remain in it until the end of the negative half-period, and in the subtraction counter 20 the number rewritten into it from the addition counter 18.

Then, with the arrival of a positive semi-period, the generator pulses through the key 7 and the second trigger 13 are again fed to the counting input of the addition counter 18 at a frequency f / 2, and the pulses by frequency, f through the keys 7,10 and the element OR 16 to the counting input of the subtraction counter 20 and etc.

Starting with the third positive half-cycle of the voltage under study, the pulses from the output of subtraction counter 20 will appear strictly. In the middle, put half a period for J3 (Fig. 2i), since in the subtraction counter 20 the number from the addition counter 18 is written in the subtraction counter 20, which is equal to f / 2, T / 2, 1/4 fT, and to the input of the subtraction counter 20 enters the beginning of the positive half-period of the frequency f, it means O is established in the subtraction counter 20 through T / 4, i.e. in the middle of the positive half period.

In the absence of interference, pulses from the output of subtraction counter 20 also appear strictly in the middle in the negative half-period, since in the middle of the positive half-period preceding it, the number 1/2 from 1/4 f-T was written to subtraction counter 20, i.e. 1/8, and at the beginning of the negative half-cycle, pulses of frequency f / 2 arrive at the input of the subtraction counter 20, hence, O will set in 1/4, i.e. in the middle of the negative half cycle.

If there is a constant component of interference, the positive impulse from the output of limiting amplifier 5 will be shortened or shortened depending on whether the zero line is shifted down or up, and the impulse from the output of subtraction counter 20 is still strictly in the middle of the positive half-period, starting with the third positive: half period after turning on the phase meter.

If there is a variable component of interference (Fig. 3a), in addition to the main impulse, several short pulses can appear at the beginning and end of the positive half-period (Fig. 3b during which the counters will be added) pulses with an if / 2 frequency (fig. Sv, e), and at the counting input of the subtraction counter pulses with a frequency f (fig. H), therefore O at the output of the subtraction counter will be strictly in the middle of the positive half-cycle, despite the presence of interference (fig. This impulse passed through A key 9, i.e. a pulse corresponding to the middle of the half (of the output half-period (or the moment the signal passes through the maximum)) is used later in the resolver to form a time interval corresponding to the phase shift, its measurement and recording by one of the known methods.

The impulse from the output of subtraction counter 20 in the negative half-period in the presence of interference is shifted from the middle to the left, while the zero line is shifted up, the latter leads to the fact that for the previous positive half-period, the number 1/4 was written to the addition counter 18 and shifted to the right if the zero line shifted down and the number 1/4 fT is written in the meter due to interference

But since this signal is used only to stop the supply of pulses to the subtraction counter of the 20 census number from the addition counter 1B

and resetting it to O after a time sufficient for overwriting and certain delay elements 7, it does not affect the measurement accuracy and its location is indifferent. The total per disturbance is of such a size that before the arrival of the next positive half-period, the addition counter is transferred to O.

The number K can be any, it is necessary to accelerate the entrance to the regime, more precisely, to accelerate the appearance of the first pulse from the output of the subtraction counter.

Claims (2)

1. USSR author's certificate f 480996, cl. G 01 R 25/00, 1972. 2. USSR author's certificate №311214, cl. G 01 R 25/00, 1968. {) Ls well } ( Rig.2 m m illllHIHIiniHIIIIHm 111 III m ilUilL  F.G.