SU773906A1 - Digital frequency discriminator for frequency automatic tuning device - Google Patents

Description

The invention relates to electronics and can be used in blocks of formation and stabilization of the frequency grid.

Known digital frequency discrimination! a minator working on the principle of digital comparison of the frequencies of the reference and tuned (input) signals, containing two discriminators of zero beats, a low-pass filter, a regulator, a phase detector and a summing unit connected to three feedback loops [1].

However, this device is characterized by the dependence of noise immunity 1 on the stability of the tunable generator.

The closest technical solution to the proposed one is a digital discriminator containing a reference frequency nickname, the output of which through a frequency divider is connected to the first input of the AND gate, the second input of which is connected to the output of the adjustable oscillator, and 1 reverse counter [2).

The disadvantages of this discriminator are insufficient noise immunity and a relatively longer time of frequency tuning. j

The purpose of the invention is to increase the perspiration resistance and reduce the frequency tuning time.

This goal is achieved by the fact that in the digital frequency discriminator containing the reference frequency source, the output of which through the frequency divider is connected to the first input of the logical element And, the second input of which is connected to the output of the adjustable generator, a reversible pulse counter, a deadband zone forming unit is introduced into it, a block for determining the direction of frequency tuning and a pulse counter, the input of which is connected to the output of the logical element And, and the outputs are connected bitwise to the inputs of the block definition I have the frequency tuning direction and the dead band forming unit whose additional input is connected to the clock bus, and the inputs of the reversible pulse counter are connected to the outputs of the frequency tuning direction determining unit and the Dead band forming unit.

The drawing shows a structural electrical circuit of the discriminator.

The discriminator contains a source 1, a reference frequency tunable generator 2, a frequency divider 3, the input of which is connected to the output of the source 1 of the reference frequency, the output of which is connected to the first input of the logic element 4 AND, the second input of which is connected to the output of the generator 2, and the output is connected to the input 5 pulse counter, the outputs of which are bitwise connected to the inputs of the corresponding multi-input logic elements 6-8 AND block 9 of the formation of the deadband, which includes the logical element 10 OR, whose inputs connected to the outputs of the logic elements 6 to 8 I. The output of the counter 5 pulses is bitwise connected also to the inputs of the multi-input logic element 11 AND, which is included with the two-input logic elements 12 and 13 AND in the block 14 determining the direction of the frequency tuning. The inputs of the elements 12 and 13 And are connected to the corresponding outputs of block 9 and the output of the element 11 I. The outputs of block 9 and block 14 are connected to the inputs of the reverse counter 15 pulses, ria additional input 16 of the block 9 of the formation of the dead band of the logical element 10 OR gives a clock signal frequency.

The discriminator works as follows.

If the frequencies of the tunable generator 2 and the source 1 are equal, the output of the logic element 7 AND is formed, which prohibits the passage of the clock frequency to the input of the reversible counter 15. pulses. With an increase in the number of pulses in the packet at a frequency of the tunable generator 2, which is higher than the reference frequency of the source 1, the inhibition potential is formed by element 6 I, and when the frequency decreases, it is formed by element 8 I, operating similarly to element 7 I.

The number of such logic elements 45 is determined by the size of the deadband.

The determination of the direction of adjustment is carried out in block 14, also built on the logical elements 50 AND, and the element 11 AND works similarly to the logical element AND block 9.

The signal of the reference frequency source 1 is fed to a frequency divider 3, the division coefficient of which is chosen 55 such that the half-period of the output oscillation determines the required number of pulses at the counting point. The generated counting interval is filled with pulses of the adjustable frequency generator 2 in the logic element 4 I. The burst of pulses goes to the counter 5, where the number of pulses is counted.

- The results of the count from the bits of the counter are fed to the logical elements 6, 7 and 8 AND block 9 of the formation of the zone, the deadband and the multi-input logic element 11 AND, _ block 14.

With an increase in the frequency of the tunable generator 2 relative to the frequency of the source 1, the potential from the output of the element 6 And and the element 11 And, 15 arrives at the input of the element 11 And, 15 and with a decrease in the frequency at the input of the logic element 12 And the potential comes from the output of the elements 8 And 11 I. Depending on the presence of the corresponding output potential of the logic elements 12 and 13 And, the operation of the reversible counter, which determines the direction of adjustment, is controlled.

Claims (2)

The discriminator contains a source of reference 1 adjustable frequency; a generator 2, a frequency divider 3, the input of which is connected to the output of source 1 of the reference frequency, the output of which is connected to the first input of the logic element 4 And, the second input of which is connected to the output of the generator 2, and the output is connected with the input of the counter 5 pulses, the outputs of which are bitwise connected by the combination of the corresponding multi-input logic elements 6-8 AND block 9 of the formation of the dead zone, which includes the logical element 10 OR, whose inputs connected to the outputs of the logic elements b - 8 I. You; the counter of 5 impulses is also connected to the inputs of the multi-input logic element 11 AND, which comes together with two-input logic elements 12 and 13 And into the block 14 for determining the reorganization direction : 5yki frequency. The inputs of the elements 12 and 13 And are connected to the corresponding / current outputs of block 9 and the output of element 11 I. The outputs of block 9 and block 14 are connected to the inputs of the reversible counter 15 pulses. On the additional input 16 of the block 9 of the formation of the dead zone of the logic element 10 OR signal clock frequency. The discriminator works as follows. When the frequencies of the adjustable oscillator 2 and source 1 are equal, the potential that prohibits the passage of the clock frequency to the input of the reversible counter 15.pulses is formed at the output of the logic element 7I. With an increase in the number of pulses in a packet at a frequency of adjustable generator 2, greater than the reference frequency of source 1, the inhibition potential is formed by element bI, and when frequency decreases, element 8I operating similarly to element 7I. The number of such logical elements is determined by the size of the zone telnosti. The determination of the tuning direction is carried out in block 14, also constructed on the AND gates, and the element 11 AND operates analogously to the AND gamble of the block. The source 1 signal of the reference frequency enters frequency divider 3, the division factor of which is chosen such that oscillations determined the required number of pulses at the counting point. The generated counting interval is filled with the pulses of the oscillator with adjustable frequency 2 in the logic element 4 I. The pulse train arrives at the counter 5, where the number of pulses is generated. The counting results from the counter bits go to logical elements 6, 7 and 8 AND block 9, zone insensitivity and multi-input logic element 11 AND block 14. When the frequency of the adjustable oscillator 2 increases relative to the frequency of source 1, the potential of the logical element 13 arrives from the output of element 6 And and element 11 And, and when reducing the frequency to the input of logic element 12 And P9, the potential comes from the output of elements 8 And 11 And, Depending on the availability of the corresponding output potential of logic elements 12 and 13 I control the operation of the reversible counter that determines the direction of the overhaul. DETAILED DESCRIPTION OF THE INVENTION A digital frequency discriminator for an automatic frequency control device comprising a frequency source, the output of which is connected via a frequency divider to the first input of an AND logic element, the second input of which is connected to the output of a tunable oscillator, and a reversible pulse counter, the purpose of improving noise immunity and reducing the time of frequency tuning, it introduced a block of forming a deadband, a block determining the direction of tuning Frequency and pulse counter input. which is connected to the output of the logic element And, and the outputs are connected bitwise to the inputs of the frequency tuning direction determining unit and the deadband formation unit, the auxiliary input of which is connected to the clock signal bus, and the inputs of the reversible pulse counter are connected to the outputs of the frequency tuning direction determining unit and the unit formation of a dead zone. Sources of information taken into account in the examination 1. V. Karshin. Methods for detecting radio signals with phase shift keying. Collection of Phases and relative phases of telegraphy. M, Holy Hour, 1967, p. 126 - 132, Fig.8. 2. Authors certificate of the USSR 581565, cl. ri 03 D 3/12, 05.22.72.