SU767976A1 - Frequency synthesizer - Google Patents

Description

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The invention relates to radio engineering and can be used to form a grid of frequencies in radio transmitting and receiving devices.

A known frequency synthesizer, containing a series-connected reference oscillator, a phase detector, a low-pass filter, a controlled oscillator, a frequency divider with a variable division factor, and a 10-phase modulator, the output of which is connected to another phase input (on date A corrector filter output 13 is connected to the control input of the phase modulator. fS

However, the known frequency finder does not provide sufficiently large spectral purity of the output signal due to the fact that it is in it. The own noises of the controlled generator are not sufficiently compensated.

The purpose of the invention is to increase the spectral frequency of the output car channel. -25

For this purpose, in a frequency synthesizer containing a sequentially included reference oscillator, a phase detector, a low pass filter, a controlled oscillator, a frequency divider with

variable division factor and. phase modulator, the output of which is connected to another input of the phase detector, and the output of the correction filter is connected to the control input of the phase modulator, a frequency demodulator is inserted between the output of the controlled oscillator and the input of the correction filter.

FIG. Figure 1 shows the structural electrical circuit of the proposed frequency synthesizer; in fig. 2 - time diagrams of his work. .

The frequency synthesizer contains a reference oscillator 1, a phase detector 2, a low-pass filter 3, a controlled oscillator 4, a variable frequency divider 5 (DFD), a phase modulator 6, a frequency demodulator 7, and a correction filter 8 (Fig. 1) .

The frequency synthesizer works as follows.

The output frequency of the controlled oscillator 4 is divided into DPCD 5, passes through the phase modulator 6 and is compared in phase detector 2 with the frequency of the reference oscillator 1. Error cvtrtfeai from the output of phase detector 2 through the filter 3 low frequencies is fed to the input of controlled oscillator 4 by changing its output frequency until end-to-end is reached. In the synchronization mode, the frequencies of the signals arriving at the phase detector 2 are equal, and the signals are shifted in phase (Fig. 2).

FIG. 2 shows the following diagrams: a - signal at the output of the reference generator 1; b - signal at the output of the DPCD 5; in - the signal at the output of the phase modulator 6; g is the signal at the output of the phase detector 2 (t is the phase shift between the signals).

In the absence of noise of the controlled oscillator 4, the signal at the output of the frequency demodulator 7 will be constant, the signal at the output of the correction filter 8 will be equal to zero, and the SG above the output of the PDDK 5 will pass through the phase modulator 6 without changes. The duration of the signal at the output of the phase detector 2 will be equal to T.

If under the influence of; Self-controlled frequency oscillator

4decreased, a decrease in its frequency leads to an increase in the phase shift between the signal of the reference generator 1 and the signal from the output of the PDCD

5na dt If the phase modulator 6 in the circuit is absent, then the duration of the signal at the output of the phase detector 2 is also increased by DT. Such an increase in duration

insufficient to quickly compensate for the initial decrease in the frequency of the controlled oscillator 4.

 If there is a phase modulator 6 in the circuit, the output of the frequency demodulator 7 has a signal proportional to the frequency of the controlled oscillator 4. This signal is fed to the input of the correction filter 3, the output of which appears to be a signal proportional to the change in the frequency of the controlled oscillator 4. In the case of reducing the frequency of the controlled oscillator 4, this signal will be negative and will provide an additional shift on the phase modulator b by .D t c-signal from the DCDD 5. As a result, this long signal at the output of the phase detector pa 2 uvelchivaets eshe on DT, thus providing those expedited payment reduce initial frequency controlled oscillator 4.

In the case of an increase in the frequency of the controlled oscillator 4, the circuit operates similarly. In this case, the output of the correction filter 8 is Vits: a positive signal, which will result in an additional decrease in the duration of the signal at the output of the phase-shift detector 2 for accelerated compensation of the increase in the frequency of the controlled oscillator 4, i.e. the inclusion in the circuit of the frequency demodulator 7, the input of which is connected to the output of the controlled oscillator 4, and the output - c. corrective filter 8 provides for the modulation of the phase shift coming from the DPKD 5 output in accordance with the change in the frequency of the controlled generator, 4. In this connection, the noise spectrum of the controlled generator 4, which is weakened at the output of the PDKD 5 due to the division, the signal at the output of phase modulator 6 appears in the signal without attenuation. Consequently, in the output signal of phase detector 2, the noise spectrum of the controlled oscillator 4 will also be amplified, which contributes to better noise compensation.

Thus, in the proposed device, the own shagles of the controlled oscillator are compensated, in particular, the high-frequency components of the noise spectrum, which leads to an improvement in the spectral purity of the output signal of the synthesizer.

Claims (1)

1. US patent No. 4009450, CL. 331-1, publ. 15.02.77 (prototype)