SU760077A1 - Information exchange device - Google Patents

Description

The invention relates to the field of computing and can be used in computers for the exchange of information between the RAM and external devices.

Known devices for the exchange of information intended for the exchange of data between RAM memory and external devices, containing information register, address register, control word register, device number register, character register, device number generator, issue register, requirements register [1].

The operation of these devices is controlled by the digital computer processor in the indirect program control mode, in which the process of information exchange includes three phases: preparation of the exchange, the exchange itself and the completion of the exchange. In this case, the first and third phases are performed by the software processor, and the second - by the hardware through the exchange device.

In preparing the exchange with external devices, the processor generates control words, sends them to memory at fixed addresses and initiates the operation

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input-output, issuing to the exchange device the appropriate command. 'The direct exchange of information between the memory of the digital computer and external devices is carried out by the device itself.

₅ exchange, which, for each request of these devices, reads control words from the memory of the digital computer, analyzes, modifies and writes them back to the memory, transfers information from external devices to the storage device, or vice versa.

A disadvantage of the known devices YaV 'wish to set up their low throughput due to the need to use the control words for controlling the volume of information transmitted, it hell ¹⁵ resatsiey in memory and an exchange mode, whereby in each session occurs multiple memory access exchange device CVM read and write control words.

₂₀ The closest to the invention in terms of the essence of the technical solution is a device for the exchange of information, containing an information register and an address register connected to a communication bus with

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a passing device, a trigger for the exchange direction connected by an input to the bus of the direction of exchange, drivers of the device number and the switch number, a register of information output, a register of requirements connected to the communication bus with external devices, a register of the device number whose input is connected to the output of the register of requirements - with the inputs of the address register, device number drivers and switch number. In addition, the device includes a control unit associated with the corresponding inputs and outputs of the word sign trigger, address register, exchange direction trigger, replacement sign generation unit, control word registers connected by inputs to the information register outputs and the character register associated with the information register and with the outputs of external devices [2].

The disadvantage of this device is low bandwidth.

The purpose of the invention is to increase the capacity of the device.

This goal is achieved by the fact that, in the device containing the information register, address register, exchange direction trigger, the outputs of which are the corresponding communication outputs with the device memory, the output register, the input and output of which are respectively the first communication input with the device memory and the read output device, the register of requirements, the inputs of which are the corresponding inputs of the device requirements, and the register of the device number) connected by the outputs with the corresponding inputs of the device number generator Twa, the outputs of which are the outputs of the respective addressable unit, the switch write buses introduced, the switch bus write addresses, directions of exchange switch, the trigger requirements the OR gate and a node 'priority. At the same time, the outputs of the register of requirements are connected to the group of inputs of the priority node, whose outputs are connected to the corresponding inputs of the register of the device number and the OR element connected to the first input of the requirements trigger, with the first groups of inputs of the write bus switch, the write address bus switch and the exchange direction switch, the second groups of inputs of which are respectively the device recording inputs, device address inputs and device exchange direction inputs, and the outputs are connected respectively to the first th inputs of the information register, address register and trigger of the direction of exchange, the second inputs of which are connected to the second communication input with the device memory, the second input of the requirements trigger, the output connected to the first input of the requirements register and the corresponding communication output with the device memory,

with the first input of the priority node and the second input of the register of requirements.

—Introduction of the indicated nodes with the appropriate links into a known exchange device allows in specialized

5 information and control systems with a fixed for each external device, the amount of information transmitted, the format of transmitted messages and the composition of tasks solved in a digital computer, exclude the participation of a digital computer processor in information exchange operations, assigning all functions of organizing information exchange directly to an exchange device. At the same time, the information transmitted in the memory of the digital computer, the selection of the external device and the exchange mode are addressed by the device itself and the use of control words is eliminated.

A fixed 20 memory array is assigned to each of the external devices in the memory of the digital computer, and all information exchange is performed by the device exchanging off-program without the participation of the processor through the common memory field in the memory of the digital computer.

Each communication session with the external mouth roystvom exchanging device ¹⁵ becomes a digital computer memory only once for reading or writing information code.

The drawing shows the block diagram of the device.

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It contains a priority node 1, a priority bus 2, a write bus switch 3, a write address bus switch 4, an exchange direction switch 5, a device number register 6, an OR 7 element, a trigger 8 for requirements, device inputs and outputs 9, input groups and outputs communication with the memory, the register 10 requirements, the register 11 of issue, driver 12, the device number, the trigger 13 of exchange, the register 14 addresses, yn ₄₀ formational register 15, inputs 16 records inputs 17, address inputs 18 of exchange, inputs 19 requirements, yields 20 device addresses and readout output 21 Ia

- devices.

The device works as follows. 4 $ External devices whenever

they are ready to receive or send information, set the request signal to the corresponding input 19 and at the same time the exchange direction signal - to the corresponding inputs 18, the code of the number or attribute of the requested parameter (relative parameter address in the memory of the digital computer) - to the corresponding inputs 17 and when entered into TsVM, the entered information code - on the corresponding entrances 16. Signals with

55 inputs 19 are entered in register 10 and from the output of this register are fed to the corresponding inputs of node 1. Node I priorities, analyzing the presence of requirements in

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register 10 and the allocation of the most priority of them, generates a priority signal on the corresponding bus 2 priority. The priority signal on bus 2 through the element OR 7 sets the trigger 8 requirements, the signal from the output of which blocks the inputs of node 1 and register 10 and enters the corresponding output 9. The same priority signal έ bus 2, entering the input of register 6, enters the code external device numbers accepted for service.

At the same time, the priority signal on the corresponding priority bus 2 records: from the corresponding inputs 16 through the switch 3 to the information register 15; from the corresponding inputs 17 through the switch 4 to the register 14; from the corresponding inputs 18 through the switch 5 to the trigger 13. The address code stored in the register 14 is formed in the switch 4 from the base address stored in the switch 4, the relative address received on the corresponding input '17 from the external device. Simultaneously with the signal requirements of the device exchange for service, coming from the output of the trigger 8, information from the address register 14, the exchange direction trigger 13 and information register 15 is output to the corresponding inputs 9 when the information is entered.

The servicing of the exchange device requirement in the memory of the digital computer ends by issuing one of the inputs 9 of the reset signal, which, acting on the corresponding inputs of the trigger 8, the trigger 13, the register 14, the information register 15 and the requirements register 10, resets them to the initial state. At the same time, according to the same signal of the receiver, the device number generator 12, in accordance with the device number code, arriving at its input from the register 6 output of the device number, generates a device number signal at one of its outputs, outputting it to the corresponding output 20.

When information is output simultaneously with the reset signal, the code read from the memory is issued to the inputs 9, which is output through the output register 11 to the output 21 of the readout, which is common to all receiving external devices. Reception of information in an external device is gated by the signal of the device number at the corresponding output 20 of the device number.

The reset signal, setting the trigger 8 to its original state, releases the priority node 1 and register 10, after which the exchange device is released to service the next external device demand for information exchange.

Thus, the exchange device performs parallel exchange of information between the memory of the digital computer and external devices in the time division mode. At the same time, for each request of the external device, the exchange device is stored in the memory of the digital computer only once — to record the input or to read the output code, and the capacity of the device increases and is limited only by the access time of the memory of the digital computer.

Claims (1)

Claim A device for the exchange of information containing an information register, address register, trigger of the direction of exchange, whose outputs are the corresponding communication outputs with the device memory, the output register, whose input and output are the first communication input respectively with the device memory and the read output of the device , the register of requirements, the inputs of which are the corresponding inputs of the device requirements, and the register of the device number connected by the outputs with the corresponding inputs of the device number generator, out Which odes are the corresponding address outputs of the device, characterized in that, in order to increase the capacity of the device, a write bus switch, a write address bus switch, an exchange direction switch, a demand trigger, an OR element and a priority node are entered into it; to the group of inputs of the priority node, the outputs of which are connected to the corresponding inputs of the register of the device number and the OR element connected with the output to the first input of the requirements trigger, with the first commands of the write bus switch inputs, the write address bus switch and the exchange direction switch, the second groups of inputs of which are respectively device write inputs, device address inputs and device exchange direction inputs, and the outputs are connected to the first inputs of the information register, address register and exchange direction trigger respectively , the second inputs of which are connected to the second input of communication with the device's memory, with the second input of the requirements trigger, the output connected to the first input of the register ebovany and corresponding output communication with memory device ^ the first input of the priority node and the second input of the register of requirements. ’