SU758127A1 - Interface - Google Patents

Description

The invention relates to computing and can be used, for example, to pair a computer with a group of equipment equipped with numerical control systems.

Known devices for the exchange of information, containing a communication unit with a channel, a unit, mode analysis, a load register, a release node, a buffer register, a control unit, a receiving node, a discharge counter, a subscriber communication unit, and a mode trigger, these devices provide for the exchange between computers and a group of subscribers [Ϊ].

The disadvantage of these devices lies in their complexity and large hardware costs, as well as low bandwidth.

Closest to the invention. In its technical essence, it is a device for interfacing, containing a communication unit with a channel, including a communication register, mask and request registers and a command processing unit, subscriber subchannels consisting of a counter, a driver of control signals, a package cn2

equal words and communication center with subscriber E23 ·

The disadvantage of this device is low bandwidth.

The purpose of the invention is to increase throughput.

This goal is achieved by the fact that the device containing 10 communication unit with the channel, the first input and output of which are respectively the input and output of the device, and the second output is connected to the input of the buffer register, and the subscriber subchannels 45, the first inputs and outputs of which are the corresponding input · Dami and outputs from the group of inputs of the device’s outputs, the second inputs are connected to the third input of the communication unit 20 with the channel, the third inputs to the first output of the buffer register, and the second outputs to the corresponding inputs from the group of inputs of the unit ligature channel, each subscriber channel pod25 comprises a counter, a customer communication node, whose output is connected to the first output local sub-channel, and control signal generating unit, first ed input and output of which is connected with

3

758127

responsibly to the second input and output of the subscriber's subchannel, and the input output - to the input - output of the communication center with the subscriber, the service attribute decoder and the poll distributor are entered, and in each subscriber's subunit is a memory unit, the address end address decoder and two elements And, the second output buffer the register is connected to the input of the decoder service signs, the output of which is connected to the third inputs of the subscriber's subchannels, the fourth inputs of which are connected to the corresponding outputs of the polling distributor connected by the input to the fourth output the house of the communication unit with the channel, the second and third inputs of the node forming the control signals in each subchannel of the subscriber are connected respectively to the third and fourth inputs of the subchannel, the second and third outputs are respectively to the first inputs of the first and second elements And, and the fourth and fifth inputs respectively the output of the decoder address of the end of the zone connected to the output of the counter, and the first output of the memory node, the second output of which through the second element I is connected to the input of the communication node with the subscriber, and the input to the input of the counter and the output of the first of the AND gate, the second input of which is the second input of the local sub-channel.

The drawing shows the block diagram of the device.

The device contains a communication unit 1 with a channel, a buffer register 2, a reset node 3, a polling distributor 4, a decoder 5 service attributes, subscriber subchannels 6, including the first element AND 7, a control signal generation node 8, a memory node 9, a counter 10, the second element And 13, the decoder 12 addresses the end of the zone, the site of communication with the subscriber 13.

The device works as follows.

According to the program, the channel of computer I / O through unit 1 and node 3 is the implementation of-. entails putting the required subchannels 6 into working condition. The distributor 4 sequentially polls the subchannels 6. When the subchannel 6 is ready for operation, its node 8 forms a request and issues the current address of the RAM area allocated to this subchannel through unit 1 e of the computer I / O channel b (corresponding to the system of numerical program control), from which it is necessary to transfer frames of information to control programs. At the same time, node 8 opens element 7.

The computer through the I / O channel provides information from this address to the device. The data byte of the first frame of the control program (in the frame is not

more than sixty four bytes) goes to buffer register 2 and on

\ to the decoder 5, where is highlighted (if any) sign of the end of the frame or

the end of the control program.

The data byte through the element And 7 is written to the memory node 9 and simultaneously to the counter 10, indicating the current address of the main memory area of the computer, a counting pulse is issued. Next, the transfer of data bytes continues until

10 of the sign of the end of the frame, by decoding which decoder 5 generates a signal to node 8. This signal stops the transmission of the control program frame for this sub15 channel 6.

When a subchannel 6 that is ready for operation is detected in the next polling cycle, the transmission of the control program frame is repeated.

2β When the numerical control system is ready to receive information, node 8 opens element 11 and the data byte from node 9 passes through node 13 to the subscriber (numerical control system).

After issuing all the information from node 9, the latter generates and issues to node 8 a signal that the memory is ready to receive the next cadre of the control program. Therefore

the signal in the next polling cycle node 8 again generates and issues through block 1 to the channel I / o computer request for the next frame

35 control program.

Upon reaching the buffer boundary

the decoder 12 generates and outputs the corresponding signal to node 8, which issues a signal to transfer the buffer of the zone buffer through block 1 to the I / O channel, if not all the control program information is transmitted (there is no end of program sign), the computer performs filling zone buffers

A5 of RAM, from which all information of the control program is selected with further information.

Operation output information of control programs ends on

50 initiated by the device, if all the necessary information has been transmitted, i.e. after the decoder 5 detects the end of the program.

Thus, the device provides an increase in the capacity of the device due to the parallel and independent operation of subscribers.

Claims (1)

Claim A device for interfacing, comprising a communication unit with a channel, the first the input and output of which are co5 758127 6 responsibly the input and output of the device, and the second output is connected to the input of the buffer register, and the subscriber's subchannels, the first inputs and outputs of which are the corresponding inputs and outputs from the group of inputs of the device, the second inputs are connected to the third output of the unit connected to the channel, the third inputs to the first output of the buffer register, and the second outputs to the corresponding inputs of the input group of the communication unit with the channel, each subscriber's subchannel contains a counter, a communication node with the subscriber whose output is connected to the first output n subscriber's channel, and a control signal generating unit, the first input and output of which are connected respectively to the second input and output of the subscriber's subchannel, and the input - output - to the input-output of the communication center with the subscriber, characterized in that, in order to increase the capacity of the device , a service tag decoder and a poll distributor are entered into it, and a memory node, a zone end address decoder and two AND elements are entered into each subscriber’s subchannel, the second buffer register output is connected to the service tag decoder input , output which is connected to the third inputs the subscriber's subchannels, the fourth inputs of which are connected to the corresponding outputs of the polling distributor, connected to the fourth output of the communication unit with the channel, the second and third inputs of the control signal generation node in each subchannel of the subscriber are connected to the third and fourth inputs of the subchannel respectively, the second and third you ^{and the} turns are respectively to the first inputs of the first and second elements, And the fourth and fifth inputs - respectively to the output of the decoder address of the end of the zone connected to the output 15 of the counter, and the first output of the memory node, the second output of which is connected through the second element I to the input of the communication center with the subscriber, and the input to the input of the counter and the output of the first 20 elements And, the second input of which is the second input of the subscriber's subchannel.