SU746486A1 - Selector channel - Google Patents

Description

one

The present invention relates to computing, can be used in electronic computers for the exchange of information between high-speed external devices and RAM. It also finds application in computer systems that consist of short-circuiting of several computers and a set of fast-acting external devices.

A selector channel is known, comprising a channel interface unit with a computing device, a channel interface unit with a memory, a channel interface unit with external devices serving for data exchange between & with external devices and RAM.

This channel does not provide the possibility of stopping the control program from repeated calls to that channel, as a result of which considerable time of the central processor is lost for productive work,

Closest to this invention in its technical essence is a data processing system and g

which contains a communication unit with a central processor, a channel state unit, a communication unit with external devices, an interrupt unit.

Its disadvantage is the presence of buffer memory and significant channel equipment for sampling and storing I / O commands when. Yes, the control program accesses the occupied block-multiplex channel, since the program is not informed of the channel status.

The purpose of the invention is to improve the performance of the channel when working in

15 block-multiplex mode.

The goal is achieved by the fact that the device contains the first, second, third, fourth elements AND,

20 first, second OR elements, first, second NOT elements, comparison circuit, trigger reversal, memory for storing subchannels, the first, second inputs and output of which are connected respectively to the first output of the channel state storage unit, output of the first OR element and the input of the first element NOT, the output of which is connected to the input of the access trigger, the output of which is connected to the first input of the first element AND the second input and the output of which are connected respectively to the second output of the channel state storage unit, to the second input of the block n and the first input and the output of which are connected respectively to the third and fourth outputs and to the first input of the channel storage unit, the first, fifth, sixth, seventh, eighth outputs of which are connected respectively to the first and the second inputs of the comparison circuit, the first and second inputs of the third element AND, the first input of the quarter element AND, the second input and output of which are connected respectively to the output of the comparison circuit and the second input of the second OR element, the output of which is connected with the second input of the channel state storage unit; the first and second inputs of the first element OR are connected, respectively, with the output f of the second element NOT and the output of the third element AND, the third input is connected to the output of the comparison cxeNia, the output of which is connected to the input of the second element NOT.

The scheme of the channel is shown in the drawing.

The selector channel contains a communication unit with the central processor unit 1, a k-analogue state storage unit 2, communication with external devices 3, interrupt block 4, elements AND 5-8, comparison circuit 9, elements NOT 10.11, elements OR 12,13, memory

for storing subchannels 14, trigger trigger 15,

The selector channel provides the possibility of launching high-speed external devices for operation in a block-multiplexed-control unit, when several high-speed external devices can operate simultaneously: only one of these devices is exchanged data, and all other devices operate simultaneously independently. . they work without the need for data transfer.

Through the communication unit with the central processor, the input-output commands, data and control information necessary for working with external devices are transmitted. When a start command is received from the central processor to start external devices, the channel state storage unit determines whether the channel can execute a combo. If the channel is free, the control program is informed that the command is executed; The start of the team through the communication unit with the external device is transmitted to the external device, which begins to execute it. At the end of the data transfer, the communication unit with external devices via the interrupt unit is connected

It is central that the work with the specified external device is finished.

When a control program is addressed to a busy channel, the address of the start commands and the address of the device currently operating in the channel are scrutinized in the comparison diagram 9 in order to determine whether these addresses belong to the same subchannel. If the addresses do not belong to the same subchannel, the signal from the comparison circuit 9 through the element NOT 11 and the element OR 12, together with the address of the start command, enters the memory for storing the subchannels 14 to determine whether this subchannel is currently occupied. In the same way, when comparing on the comparison scheme 9 it turned out that the subchannel was compared, but the device is not separated and the addresses are not equal, then the signal from AND 7 and OR OR 12 together with the address of the start command is sent to the address decoder to read the subchannel in memory for storing subchannels 14; If the subchannel is free, the signal from the memory for storing subchannels 14 through the NOT element 10 stores the reference on the trigger 15, and as soon as the channel becomes free, through the element 5. And interrupt unit 4 to the control program is reported (h cut interruption, in which is written the word channel conditions, all of which are zero floor) that can run start command. Thus, there is no need for. looping the control program calls to the occupied channel. If the subchannel is occupied or the subchannel is one and the devices are separated, the signal from the OR element 13 enters the storage unit of the state of Kayal 2 and, through the communication unit with the central processor 1, indicates to the control program that the start-up command cannot be executed. The control program does not access the channel until it is indicated through the interrupt that a call is possible; this frees up the processor's productive time to do other work. In addition, if there is a signal. Appeal is possible from the AND 5 element when the control system interlocks are prohibited, using the Check channel command to AND 6 element, it is possible to determine the time for a new launch of the start command.

The selector channel, operating in a block-multiplex mode, ensures the efficient operation of the control nporpaMNM during the accesses to the occupied channel, since it has

Claims (1)

Claim A selector channel containing a communication unit with a central processor, the input of which is connected to a storage and channel status unit, the input-output of which is connected to a communication unit with external devices, the output of which is connected to the first input of the interrupt unit, the output of which is connected to the input of the communication unit with a central processor, characterized in that, in order to increase the channel’s performance when operating in block multiplex mode, it contains the first, second, third, fourth AND elements, the first, second OR elements, the first, second NOT elements, comparison circuit, access trigger, subchannel storage memory, the first and second inputs and output of which are connected respectively to the first output of the channel status storage unit, the output of the first OR element, with the first input of the second OR element and the input of the first element NOT, the output of which is connected to the input of the trigger, the output of which is connected to the first input of the first element And, the second input and output of which is connected respectively with the second output of the channel state storage unit, with the second input of the interrupt unit and the first input of the second element And, the second, third inputs and output of which are connected respectively to the third and fourth output and to the first input of the channel state storage unit, the first, fifth, sixth, seventh, eighth outputs of which are connected respectively to the first, second inputs of the comparison circuit , the first and second inputs of the third AND element, the first input of the fourth AND element, the second input and output of which are connected respectively to the output of the comparison circuit and, with the second input of the second OR element, the output of which is connected to the second input a channel state storage unit, wherein the first and second inputs of the first OR element are connected respectively to the output of the second element AND and to the output of the third element AND, the third input of which is connected to the output of the comparison circuit, the output of which is connected to the input of the second element NOT,