SU741181A1 - Frequency-to-code converter - Google Patents

Description

The invention relates to a measuring technique and can be used in discrete systems of control and control with frequency inputs. A device for converting a frequency into a code comprising a driver, a control unit, a stable frequency generator, a controllable delay unit, a key, an OR element, and a counter 1 is known. The operation of this device consists in quantizing the period allocated by the driver in a reference frequency. Further, the code value in the counter is corrected by applying generator pulses to it during an interval functionally dependent on the period code and generated by the controllable delay unit. A disadvantage of this device is the complexity due to the presence of a controllable delay unit, which is essentially functional (a hyperbolic code converter in a time interval and is a very complicated device, especially with a wide range of frequency to be converted. Moreover, the device does not allow At the same time, it is possible to receive a sample of its increment simultaneously with the frequency counter. Also known is a frequency converter into a code containing two formers, two keys, a stable frequency generator, The code is frequency and counter 2. This device operates in two stages, the first of which in the converter code-frequency register uses the first driver, the first key and the generator to generate a code proportional to the period of the frequency to be converted. a code-frequency proportional to the period of the output frequency of the converter; a code proportional to the frequency to be converted is formed in the counter using the second driver, the second key and the generator. This device does not allow simultaneous acquisition of digital equivalents of frequency and its increments. The aim of the invention is to enhance the functionality of the device by providing simultaneous digital equivalents of frequency and its increment.

The goal is achieved by the fact that the frequency converter is a code containing two drivers, the input bus is connected to the input of the first one, and its output is connected to the installation inputs of the counter and converter code - frequency and the key input, the output of which is connected to the code input of the converter code frequency , a stable frequency generator, the output of which is connected to the second key input and frequency-code-frequency converter input, an additional code-frequency converter, subtraction unit, reversible counter and restart unit are entered pisi code. Moreover, the output of the first shaper is connected to the installation input of the additional code frequency converter and the control input of the code rewrite unit, to the information inputs of which the code outputs of the code frequency converter are connected, the code rewriter outputs are connected to the code inputs of the subtractor and additional code frequency converter, to the hour -to which input the frequency output of the code-frequency converter is connected, the frequency output of the additional code-frequency converter is connected to the first input in second shaper to the second input of which the information output of the subtractor is connected, sign outputs connected to the sign inputs of the reversible counter, to the counting input of the counter, as well as to the counting input of the counter and to the auxiliary input of the first shaper the output of the second shaper, while the key output is connected to the frequency the input of the subtraction unit, the clock input of which is connected to the output of the stable frequency generator.

The block diagram of the device shown in the drawing.

 . The device contains an input bus F, driver 1, key 2, stable frequency generator 3, converters 4, 5 code-frequency, code rewrite block b, subtraction unit 7, driver 8, counters 9, 10.

The device works as follows.

In the initial state, the potential of generator 1 closes key 2, the code of the previous period of the frequency being converted is stored in the Register of converter 4

Ni a fo

Ti4

where the fg-frequency of the generator 3, and in the reverse counter 9 - the code Ng, corresponding to the previous value of the converted frequency.

With the filing on the shaper 1 of the next pulse of the converted frequency at time T; the key opens

| 2, the code Nj. Is transmitted, through block b to the subtraction block: 7 and to the register of the converter 5. Through the public key 2, the generator 3 pulses go to the cleared register of the converter 4. At time T, the output frequencies of the converters 4, -5 is forbidden by applying to the installation inputs of the potential driver 1. New code value in converter register 4

N; .

In this case, in the subtraction block, the previously recorded parallel code N, is subtracted. and the number5 of the pulse code N; entering

with the release of key 2. At the end of the interval T | on the information output of the subtraction unit, a frequency takes place, proportional to the difference of the numbers ,.

Q and N, i.e. differences of periods T;,;,

and t

(N-, NI bfc, fo (t;)

  .

where P is constant.

5 At the sign outputs of the subtraction unit, the potentials are such that at T | T ;. the operation of the reversible counter 9 is allowed for subtraction, and at T; T- (- on addition.

Q At the end of the period T; the potential of driver 1 resolves the operation of converters 4, 5, their output frequencies

f, N;

T;

to to

3

F N.-1 Fg, Ti-Ti KK

where K is constant.

At the same time, the pulse generator pulse 1 is zeroed by the counter 10. By the first pulse Fp, the driver 8 is set to a state in which the driver 1 is blocked, and the pulses F. arrive at the counting inputs of counters 9, 10. This process continues until the second pulse F5 arrives. Shaper 8 is open for 1 K2 interval

in F.

f 3. F- t.

ABOUT - --(

For this time, in the reverse counter 9 is added. (At T; T; ",) or the number is subtracted (at T-, T;)

T - JS1

6N. F, 8 fxF

about -1 T-, 1 - Fi-I

Thus, in the counter 9, at the end of the conversion cycle, the number NgtANg corresponding to the current frequency value is recorded, and in the counter 10, the number ANg corresponding to the current value is taken as the last one.

Claims (2)

1. USSR author's certificate number 463926, cl. G 01 R 23 / 00,1975. 2. USSR author's certificate on application no. 2585454 / 18-21, cl. G 01 R 23/10, 02.05.78.