SU690552A1 - Device for synchronising information being reproduced - Google Patents

Description

(54) DEVICE FOR SYNCHRONIZATION OF FSPR

INFORMATION

The invention relates to instrumentation, in particular, to synchronous read phase and frequency modulation information devices. A device for imparting sync signals directly to the reproduced information, using phase locked loop to adapt the frequency and phase of the information signals l3, is well known. However, this device has a long Time to establish common mode. The closest in technical essence to the proposed invention is a device for synchronizing reproduced information, containing input buses, serially connected error generator and controlled generator, the first of which is connected to the first input of the error signal generator, and the second is connected to the second input of the generator the error signals and through the trigger - with the output bus 2. However, for high noise immunity of this device, it is necessary that filters in the circuit phase-locked loop had a narrow bandwidth or, which is the same, high inertia. The inertia of the filters sharply limits the device speed at the initial establishment of the in-phase mode, and since it is possible to ensure a slap mode before reading the information, the access time to the information can be very long. The purpose of the invention is to reduce the time to establish the common mode. This is achieved by the fact that the device for synchronizing the reproduced digital information is equipped with a switching device connected to the first, second and third input buses, a blocking signal generator, whose inputs are connected to the third input bus and the switching device, an analog switch and a voltage source. the output of which is connected to the input of the analog switch, the ujixori of the ommutation device is connected to the third input of the error generator. The output of the blocking signal generator is connected to the fourth inlet of the error signal generator, to the second inputs of the controlled oscillator and trigger, and to the control input of the analog switch, the output of which is connected to the third output of the controlled oscillator. In addition, in order to simplify and increase reliability, the misalignment driver is made in the form of a differential force of the body, the non-inverting input of which is connected to the inverse output of the first circuit and the direct output of the second AND-NOT circuit through the corresponding first and second low-pass filters and the inverting input is connected to the forward output of the first NAND circuit and the inverse output of the second NAND circuit via the respective third and fourth low pass filters. The first input of the first AND scheme is NOT the first input of the form.

worldr, the first input of the second IS – N circuit — the second input of the former, the combined second inputs of both the AND – NOT circuits serve as the third input, and the combination of other third inputs — the fourth input of the mismatch signal generator.

Fig, 1 depicts a structural cxeiMa device; in fig. 2 shows the time diagrams of his work.

The device for synchronization of the reproduced information pin contains the forma- tion of 1 mismatch signals, the T1 variable generator 2, the trigger 3 with the counting input, the switching device 4, the blocking generator 5, the analog switch 6, and the source 7 of the reference voltage. Shaper 1 mismatch signal consists of two cxet. NAND 8 and 9, with direct and inverse outputs, of four filters 1 (-13 low frequencies and a differential amplifier 14.

The frequency of the signals of the controlled oscillator 2 is the smallest common multiple of the possible input frequencies. For example, when playing a three-frequency signal, the generator frequency must be equal to twice the clock frequency. The control of the 1st generator produces, on its first and second outputs, anti-phase square-wave signals, and on the third output-signal: a triangular shape, in-phase square wave

690552

Claims (2)

1. USSR author's certificate No. 419958, cl. G 11 B 5/02, 1972. 2. USSR author's certificate No. 539331, cl. О 11 В 27/18, 1975 (prototype). SorLTLr