SU682846A1 - Apparatus for measuring parameters of electric signals - Google Patents

Description

two additional triggers, an additional logical element AND, a delay line, a counter and two code issuing units, the inputs of one of which are connected to the output of the second logical element OR and the output of a reversible counter, are entered to the outputs of the reverse trigger; and the output of the first coping trigger, one input of which is directly, and the second through the delay line connected to the first input of the second additional trigger and the output of the nerve logic element And you The second logic element I is connected to the second input of the second additional trigger, the output of which is connected to the first input of the additional logic element I, the second input of which is connected to the output of the clock generator, and the output of the additional logic element I connected to the first input of the counter, the second input of which is connected to the second output of the delay line.

The drawing shows a structural electrical circuit of the proposed device.

The device contains a clock pulse generator 1, a comparator block 2, a reverse trigger 3, a reversible counter 4, a code-voltage converter 5, logic elements OR 6, 7, level 8 deiafrarator, logic elements AND 9, 10, additional logic element AND 11 , additional triggers 12, 13, delay line 14, counter 15, blocks of issuing codes 16, 17. The measured signal is fed to the input bus 18.

The principle of operation of the device is as follows.

The signal under study is fed to the input bus 18 to the comparison unit 2, where the voltage from the code-voltage converter 5 is also proportional to the code of the reversible counter 4. Iri is the difference between the input voltage and voltage from the code-voltage converter pulses from the generator clock pulses 1 are fed through comparison block 2 to reverse trigger 3 and through logical element OR 6 to the input of reversible counter 4. The voltage at the output of the code-voltage converter varies depending on the number of pulses received by them versive counter 4 and so that the difference between the compared values on the comparison unit 2 tends to zero. At the moment of equality of the voltage at the output of the code-voltage converter and the input voltage at the output of the reversible counter 4, the binary code of the signal under study is formed. The outputs of the flip-flop of the reverse 3 set the reversible counter in one of the modes “Addition or“ Subtraction ”with each change of the sign of the derivative of the input voltage. The moment of state change of the trigger of the reverse 3 corresponds to the extreme value of the signal, which is formed at the output of the logic element OR 7, and the numerical value of the reversible counter 4, corresponding to its this time, is formed at the output of the code output unit 17. The moment of the beginning of the signal and its end

fixed in the following way. At the moment when the function of the reference level, specified by the level 8 decoder, is exceeded, an impulse occurs at its output, which is fed simultaneously to logic gates AND 9 and 10. The second inputs of these logic gates are applied to the voltage of the reverse trigger outputs. At their outputs, the instant of the onset of the signal relative to the selected level and its

ending.

At the moment of appearance of the pulse "Start of the signal, additional trigger 12 goes into a state when, at its output, but is a signal to allow passage of

impulses from the generator 1 through the logical element 11 to the input of the counter 15. Counter 15 operates until the moment of arrival of the pulse "The termination of the signal from the logical element 10, which translates the trigger 12 into

the initial state, thereby preventing the arrival of pulses from the generator 1 to the counter 15. At the output of the counter 15, a binary code equivalent to the duration of the input signal is fixed and outputted

by issuing codes 16 upon arrival of the signal from trigger 13, which is triggered by an " End of the signal. By the same signal through the delay line 14 dry, the counter 15 is reset to zero

the state and the trigger 13 to their initial position, and thus preparing the device for a new measurement cycle.

Claims (1)

Invention Formula A device for measuring the parameters of electrical signals, including its clock generator, the output of which is connected to the first input of the comparator unit, the second input of which is connected to the input bus, the third input of the comparator unit is connected to the output of the converter, code-voltage, whose input is connected to the output reversible counter and the input of the level decoder, and the outputs of the comparison unit are connected to the inputs of the nerve OR logical element and the trigger inputs to the inputs of the first logical element of the reverse, the outputs of which enes with two inputs down counter and inputs of the second OR gate, nrichem output of the first OR gate is connected to the third input of the down counter, the output level of decoder connected to the first inputs of the first and second logic elements AND, the second inputs of which are connected to the outputs of the reverse trigger, characterized in that, in order to improve the accuracy of measuring the amplitude and duration of the signals, two additional triggers are introduced into it, an additional logical element AND, a delay line, the counter and two code issuing units, the inputs of one of which are connected to the output of the second logical element OR and the output of the reversible counter, the inputs of the second code issuing unit are connected to the output of the counter and the output of ne additional trigger, one input of which is directly, and the second through the delay line connected to the first input of the second additional trigger and output of the first logic element And the output of the second logic element And connected to the second input of the second additional trigger, the output of which is connected to the first input of the additional logic element And, the second input of which is connected to the output of the clock generator, and the output of the additional logic element I is connected to the nerve input of the counter, the second turn is connected to the second output of the delay line.