SU672606A1 - Digital time-piece - Google Patents

Description

(54) DIGITAL TIME MEASUREMENT DEVICE

The invention relates to the field of electronic timekeeping and can be used in electronics, measurement technology both to indicate the current time and to measure time intervals, i.e., to build an electronic clock, digital display stopwatches. Digital time measurement devices are known with switching measurement limits, in which switching of measurement limits occurs due to a change in the division factor of the frequency divider, and the reading occurs in the decimal system 1. The closest to the technical essence is a digital time measurement device containing a master oscillator, dividers frequencies, switch, coincidence circuits, AND circuit, pulse generator, pulse calibrated pulse generator, OR circuit, decade counting pulse, digital transmitter, digital indicators, direct counting counter, the first output of the master quartz oscillator connected to the input of the pulse builder and the clock inputs of the direct counting counter, the second output of the master quartz oscillator to serially connected frequency dividers and a switch, the input of the first frequency divider is connected to the first input of the AND circuit, the second input of which is connected to the input of the Deactivator inhibitor and to the combined inputs of the matching circuits, while with the first inputs of the matching circuits the outputs of the forward counting counter are identical, the corresponding outputs of the switch are matched with the second inputs of the circuit, and the third inputs are connected to the driver of calibrated pulses, the inputs of which are connected to the corresponding outputs of frequency dividers, the outputs of the coincidence circuit OR are connected to the input "Reset decade a pulse counter, the counting input of which is connected to the output of the AND circuit, the outputs of the ten-day pulse counter are connected to the respectively combined inputs of the digital indicators via the descrambler 2. Under remnants of the known device is lack of shift measurement limits. The aim of the invention is to expand the functionality of the device.

by ensuring the switching of measurement limits.

For this, the digital time measurement device is equipped with an additional coincidence circuit, a control circuit, a shift register, a measurement limit switch, where the inputs of the measurement limit switch are connected to the corresponding switch outputs, and its output is connected to the "Record of shift register, clock input, which is connected to the output the pulse width calibrated driver, and the shift register outputs are connected to the digital indicator inputs, while the control circuit input is connected to the second output frequency divider, and the first output of the control circuit — with the control input of the additional matching circuit, the output of which is connected to the counting input of the direct counting counter; the second output of the control circuit is connected to the inputs “Reset of the forward counting counter.

FIG. 1 is a block diagram of a digital time measurement device in FIG. 2 and 3 are timing diagrams for the operation of the device.

The device consists of a master oscar / oscillator 1, dividers 2 and 3 frequencies, switch 4, a matching circuit 5, a forward count counter 6, including scaling circuits 7 operating in a phase-pulse code. The first output of the crystal oscillator 1 is connected to the clock inputs of decade counts and to one input of the imager 8 bursts of pulses, the second input of which is connected to a divider 2 frequencies. The output of the driver 8, generating pulse pulses in a bundle, is connected to the synchronization inputs of the scaling circuits 7, the conversion factor of which is “shch (the last two even circuits), thereby ensuring their operation in the phase-pulse mode. The input and output of the divider 3 is connected to the inputs of the imaging unit 9 calibrated by pulse duration, the output of which is connected to the first input of the AND 10 circuit, the inputs of the matching circuit 1, to the input "Prohibiting the decipher 12 indication, the second input of the AND 10 circuit is connected to the input of the frequency divider 2 The output of the circuit And 10 is connected to the counting input of the decade counter 13. The outputs of the counter 13 through the decoder 12 are connected to respectively the combined sign electrodes of the digital indicators 14, the common electrodes of which are respectively connected to the outputs of the register with 15. The outputs of the circuits 7 are connected via the matching circuit 11 to the OR circuit 16, the output of which is connected to the Reset Counter 13 input. The third inputs of the matching circuit 11 are connected to the corresponding outputs of the switch 4. Several outputs of the switch 4, for example, the first four outputs of the lower order The circuits 7, through the measurement limit switch 17, are connected to the input of the record of register 15, and the clock input of the register 15 is connected to the output of divider 3. The same output of divider 3 is connected to the input of control circuit 18, one output of which is connected to input of the coincidence circuit 5 conductive and the other output - to the inputs of the "Reset circuits 7.

The digital time measurement device operates as follows.

When the device is turned on, the pulses from one output of the generator 1 are fed to the synchronization inputs of ten-decade counting circuits 7 and 8 packs of pulses to one input of the generator, which generates packs of pulses according to the pulses in the packet (Fig. 2.6). Shaper 8 output connected

5 to synchronization inputs of scaling circuits 7, having a recalculation factor “6 (the last two even-numbered circuits 7). Thus, a phase-impulse mode of operation of counting circuits 7 of counter 6 is created. From the second

On the output of the master oscillator I, the pulse frequency (Fig. 2, a), which do not coincide in phase with the pulses from the first output of the generator 1, is divided by frequency dividers 2, 3 and switch 4 into frequencies; for example 100 Hz. Frequency dividers 2.3 and

5 switch 4 is made according to the scheme of frequency dividers with end-to-end transfer. In addition, the frequency divider 2 is decade and has one intermediate output to form a burst of pulses (Fig. 2.6)

0 together with the driver 8, and the switch 4 has additionally outputs according to the number of counting circuits 7 (in the described case seven outputs), on which alternately pulses with a frequency of 100 Hz appear.

five

Before starting the measurement of the time interval, the control circuit 18 closes the coincidence circuit 5 and resets the circuits 7 to the zero state with pulses with the phase of the frequency divider 3 (FIG. D).

0

When a signal is received from outside to the circuit 18, the Start-up opens the coincidence circuit 5 and transmits pulses from the transfer output of the switch 4, which follow with a frequency of 100 Hz, to the counting input of the first recalculated

5 of the circuit 7 of the counter 6. Since these pulses in phase do not coincide with the pulses arriving at the synchronization input of the circuits 7, then each pulse coming from the coincidence circuit 5 causes a phase shift of the output signal of the first scaler 7 by one

0 discreteness. In this case, the first ten-decade circuit 7 passes a series of states from "O to" 9, producing a transfer signal for the next decade with the arrival of each tenth pulse from the coincidence circuit 5.

five

Thus, the counter 6 accumulates information on the measured time interval before the arrival of the signal Stop on the control circuit 18. In this case, the circuit 18 closes

matching circuit 5, and the measurement of the time interval ends there. Counter 6 stores information about the measured time interval until the next measurement.

The output signals from circuits 7, which carry information about their state in the form of pulses that are phase-shifted relative to the pulses from divider 2 (Fig. 2., c), are fed to one inputs of the coincidence circuits 11. The second combined inputs of the coincidence circuits 11, pulses calibrated by duration (Fig. Poison) are received from the imaging unit 9, and the third inputs of the coincidence circuit 11 are alternately pulses from the outputs of switch 4 (Fig. 3.6). Since the duration of the calibrated pulses (Fig. D) produced by shaper 9 is equal to ten periods of pulses from one of the outputs of generator 1, and their duty cycle is the division factor of divider 3, then through the 1G coincidence circuit on the OR 16 circuit in one poll the switch 4 passes through only one pulse from the scaling circuits 7, which are fed to the input “Reset of the ten-day counter 13. The counting input of this counter receives packs of ten pulses (Fig.) formed by the circuit 10 through the imaging unit 9 of the pulses c generator 1. Counter 13 after arriving at its input. “Resetting each information pulse from the circuit OR 16 counts the remaining number of pulses in a packet arriving at its counting input. This converts the phase-pulse code of scaling circuits 7 into a binary-decimal potential code, which then enters through the decoder 12 to the respectively combined sign electrodes of digital indicators 14. In other words, information from all circuits 7 is alternately outputted using the shift register 15 and the switch 17, this information can be displayed on four digital indicators 14. To do this, pulses are received at the clock input of the shift register 15 s of the imaging unit 9 (Fig. 3, a or 2, d - drawings at different scales) from peri sequencers house equal to the repetition period of the input pulses switch 4. The input 15 via switch 17 registers the recording pulse is supplied from one of the switch 4 outputs, for example from the second output (Fig. 3c), which is advanced by the register. As a result, the outputs of the register 15 connected to the common electrodes of the digital indicators 14 alternately appear pulses (Fig. 3, d), which connect the digital indicators to the power source, on which information on the measured interval from the second to the fifth will be displayed sequentially. scaling schemes. And since the frequency of polling of scaling circuits 7 is chosen not lower than 25 Hz due to the inertia of the human eye, the rapid

flickering of numbers by the observer is perceived as a continuous glow. At the time when information is recorded in the counter 13 (FIG. 2, e), prohibiting pulses are sent to the decoder 12 from the output of the former 9 to eliminate the backlight of the digital indicators 14.

Thus, by changing the position of the switch 17, it is possible to change the beginning of the output of information on the indicators. In the described case, the capacity of the counter 6 is equal to 9 hours. 59 min., 59, 99s., And on digital indicators 14 this result can be highlighted in four steps:

59.99 seconds 9 minutes, 59.9 seconds 59 minutes, 59 seconds

9 hours, 59 minutes, 5 seconds.

 This corresponds to the four measurement limits.

The use of the proposed digital time measurement device will allow the switching of the measurement limits and the measurement of the measurement result in the hourly code, which increases the economy, since the main power consumption falls on the digital indicators.

Claims (2)

1. Electronic stopwatch. "EleKtronix 1975, L 8, p. 73-76 2. For all 2357178, cl. G 04 C 3/00, 1976, according to which the decision to issue a copyright certificate. oh oh s g n n n Fig.Z