SU656179A1 - Frequency multiplier - Google Patents

Description

The invention relates to the field of radio engineering and to measure technology, where it is necessary to obtain phase-stable and spectral-pure frequency multiplication.

Known frequency multiplier, containing consistently connected shaper harmonics, selective phase and amplifier, as well as the amplitude detector l.

 However, in a known frequency multiplier, the phase instability increases with an increase in the spectral purity of the OUTPUT oscillations.

The circuit of the invention is a decrease in phase instability with an increase in the spectral purity of the OUTPUT oscillations.

For this purpose, in a frequency multiplier containing a series-connected harmonic driver, a selective filter and an amplifier, as well as an amplitude detector, the amplifier is made with adjustable gain, the OUT amplifier is connected to the input of the amplitude detector, and the harmonics and control input are connected RC-Henb corrective with adjustable time constant, the control INPUT of which is poked to the output of the amplitude detector. The drawing shows a structural electrical frequency multiplier circuit.

. A frequency multiplier harmonic shaper 1, a selective filter 2, an amplifier 3 with an adjustable gain factor, a corrective RC-circuit 4 with an adjustable stand-by time and an amplitude detector 5.

The frequency multiplier is speedy.

Claims (1)

The harmonic shaper 1 mode is selected so that, at the output of the selective filter 2 (for example, an LC circuit), the maximum of the extracted harmonic is obtained. At the output of the selective filter 2 receive a sinusoidal oscillation with damped amplitude, i.e. oscillations with spurious amplitude modulation. The output includes a corrective RC -ce: /;.../-. ; .. Do, //. - ,,,. y. “G,, F, - / J, .- b iTvfi4 if-PI 4 tMnipHMep, by ia-digiting or digitizing K, receive an exponentially varying (increasing or papaclet) voltage, which adjusts the gain factor of the amplifier 3 in the interval between impulses at the output of the harmonic generator 1 in such a way that the attenuation of the voltage at the output of the selective filter 2 is compensated for by the increasing gain of the amplifier 3. With accurate damping at the output of the amplifier 3, a sinusoidal oscillation with a multiplied frequency without parasitic amplitude mode is obtained tion. When undercompensation or overcompensation, an error signal appears at the output of amplitude detector 5, which affects the correction time {on circuit 4, changing it to the optimal value (for example, changing the resistance of the field-effect transistor connected in series with the integrated differential capacitance) . The proposed frequency multiplier makes it possible to significantly increase the phase stability of the output oscillation of a large number of frequency multipliers, since in such a multiplier, low-bandwidth selective systems can be used. Claims A frequency multiplier comprising a serially connected harmonic driver, a selective filter and an amplifier, as well as an amplitude detector, characterized in that, in order to reduce phase instability with an increase in the spectral purity of the output oscillations, the amplifier is made with an adjustable gain factor and the output of the amplifier is connected to the input an amplitude detector, and a corrective RC is connected between the output of the harmonic driver and the control input of the amplifier. An r-circuit with an adjustable constant The control input is connected to the output of the amplitude detector. Sources of information taken into account in the examination 1. US Patent No. 3571627, cl. ZO7-271, 19.71.