SU651446A2 - Discrete syncronizer - Google Patents

Description

(54) DISCRETE SYNCHRONIZER

one

The invention relates to radio engineering, in particular to radio navigation, and can be used in receiver-indicators of phase radio navigation navigation systems -.

According to the main auth. No. 332558 is known a discrete synchronizer comprising a series-connected master oscillator, an addition subtraction circuit, a controlled divider, a separation circuit, phase distortions and an input device, a reversible counter, a unit recording circuit with two outputs, a unit auto-reset circuit, the outputs of which are connected via adders to the inputs The addition circuit of the subtraction, the output of the unit writing circuit, are connected via the addition ring and the subtraction ring register with the inputs of the autosall circuit of units 1, respectively.

However, the known discrete synchronizer slowly enters synchronization.

The aim of the invention is to reduce the time of entry into synchronism.

To do this, a discrete synchronizer containing a series-connected master oscillator, an Add-Subtract circuit, is controlled by

divider, phase distortion isolating circuit and input device, reversible counter, two-output unit writing circuit, unit auto-reset circuit, whose outputs are connected via adders to the inputs of the addition-subtraction circuit, the units write output outputs are connected via an addition ring and a subtraction ring register, respectively with the inputs of the auto-reset circuit of units, an analyzer is entered, the inputs of which are connected respectively to the outputs of the master oscillator and the input device, and the outputs are connected to the additional inputs I will give a controlled divider.

The drawing shows a functional electrical circuit of the device.

The discrete synchronizer contains a series-connected master oscillator 1, an addition-subtraction circuit 2, a controlled divider 3, a phase distortion isolation circuit 4 and an input device 5, a reversible counter 6, a circuit for writing units 7c to two outputs, an auto-reset circuit for units 8 whose outputs are connected via adders 9, 10 with the inputs of the circuit for adding and subtracting 2, the outputs of the circuit for writing units 7 are connected respectively to effHQ via the ring register for adding 11 and the ring register of subtraction 12 to the inputs of the circuit for collecting circuits 87 analyzer 13-, c; By oogo sedineny vyodami respectively to oscillator 1 and the input of the device 5, and outputs to additional inputs podklyueny councils emogo divider 3, the switch 14.

The device works as follows. The inputs of the analyzer 13 postutta respectively pulses from the output of the master oscillator 1 and the pulses of the edges of the received signal. GOES ON to measure the frequency ratio of these two sequences of the pulses, for example, counting the number of pulses from the output of the master oscillator 1 for the period of the frequency of the input signal. The number obtained as a result of the measurement is the division coefficient 1, which must be provided with a controlled divider 3 so that the frequency of the reference divides it: with the frequency value of the received signal. To reduce the effects of noise, the frequency ratio measurement is turned a certain amount, a number of times, and then the measurement results are averaged. When the device is initially entered into synchronism with a signal whose frequency has been tuned to a relative reference frequency, or in the event of a phase disruption during operation: 6 in synchronization due to the departure of the received signal from its nominal value, the averaged value of the frequency ratio measurement results is the desired division factor It comes in the form of a code from the first analyzer 13 to the additional inputs of the controlled divider 3, specifying the division factor of the latter. The fOTci hour of the reference signal at the input of the controlled divider 3 will be equal with the accuracy determined by the instrumental measurement error of the frequency ratio, the frequency of the received signal. The instrumental error depends on the Frequency Ratio of the received signal and the master oscillator and can be made quite small. The calculation of the frequency of the reference clock frequency of the No signal is fully determined by this error. Therefore, outside the yymbystyy 6m pkcCof la sovany of the reference and received frequencies, synchronization will be carried out only in the Wyrzd; ., and, trace: telmo7 in the synchronization rem will be small. The exact input of the device into synchronism is as follows. The signal arrives at the input device 5, which generates impulses of the received signal, which arrives at the phase distortion isolation circuit 4. The pulses from the output of the controlled divider 3 and the pulses from the master oscillator 1 arrive at this. which corresponds to the magnitude of the phase; mismatch, filled with pulses of the master oscillator

1. These pulses are fed to a reversing counter b. To eliminate the phase mismatch of a sign is reduced (increased)

the frequency of the master oscillator 1, which is achieved by subtracting (adding) pulses to the controlled divider 3. When the reversing counter 6 is filled through

a scheme for writing units 7 is written into the circular subtraction register 12 (Appendix 11). This unit will move with a clock pulse of a certain frequency. The frequency of the clock pulses can be changed using switch 14. From the ring subtraction register 12 (appendix 11), the subtraction commands (addition) are sent to the add-subtract scheme

2. If the phase mismatch is not eliminated, one more unit will be written to the corresponding ring register and the number of commands to be subtracted (addition) will be doubled, etc.

If the discrepancy is eliminated, units will not be recorded in the circular register of subtraction 12 (Appendix 11), but the number of units already recorded will issue commands for phase adjustment.

The introduction of the analyzer ensures the operation of the device in the capture mode and, therefore, significantly reduces the synchronization time. For example, if the frequency of the received signal has an initial detuning relative to the frequency of the reference voltage, which is ten times higher than the pickup band of the prototype device, then the time of drawing the prototype device into synchronism reaches several minutes, and the synchronization time of this device does not exceed several seconds equality of other characteristics.

Claims (1)

1. Copyright certificate CX; CP 332558, cl. H 03 B 3/04, 1970.