SU651348A1 - Fourier coefficient computing arrangement - Google Patents

Description

The goal is achieved by wo, a serially connected adjustable frequency divider and a clock pulse generator, whose control input is connected to an additional output of the control unit, are connected to the device, and the output is connected to the information input of a reversing vertical switchboard {serial, sequentially connected adjustable frequency multiplier, driver pulses of origin, control unit and converter of the original signal, the output of which is connected to the signal input of the block The signal outputs and control outputs of which are connected to the corresponding inputs of the distribution unit, the control inputs of the vertical channels of the selection unit are connected to the outputs of the reversible switch of vertical channels and the control inputs of the horizontal channels of the selection unit are connected to the outputs of the reverse switch of the horizontal channels connected to the control unit of the horizontal channel reversing switch mode, the information inputs of the unit are regulated by the reversing switch mode w The vertical channels are connected to the first and last outputs of the reversing switch of vertical channels, each of the 2p computing blocks additionally contains a multi-input phase-inverting node, the inputs of which are connected to the outputs of the weighting resistors of the group, the two-channel switch, the output of which is connected to the corresponding integrator input, and the control inputs through the mode control node is connected to the control outputs of the distribution unit, the first memory node whose input is connected to the output of the integral ora, and the control inputs of the first memory nodes of all computational blocks are connected together and connected to the corresponding output of the control unit, and the second memory node, whose input is connected to the output of the first memory node, the output is connected to the corresponding input of the And block, and The input inputs of the second memory nodes of all computational units are connected together and connected to the corresponding output of the control unit, and the corresponding outputs of the headlamp unit are connected to the inputs of the adjustable frequency divider, adjustable a frequency multiplier and the converter of the original signal and of ravl yuschy control unit input is connected to the corresponding output switch reversivHOixD gorizonatlnyh channels.

The drawing shows a block diagram of the device.,

A device for calculating the Fourier coefficients with input 1 contains a large-scale block 2, an adjustable divider 3 frequencies,

4 clock pulses, adjustable smart frequency resident 5, driver 6 pulses started counting, control unit 7, source signal converter 8 consisting of two memory cells connected to its inputs and outputs, reversible switch 9 vertical channels, block 10 control of the mode of the reversing switch of vertical channels, reversible commixator 11

horizontal channels, block 12 for controlling the mode of the reversible switch of horizontal channels, block 13 for selecting, block 14 for distributing, block 15 for controlling, computing blocks 16i and 16j, ... 1b2p- |

17i and Pa groups, ..., resistor resistors, multi-input junction nodes 18i and 182, ... ISg. and ISjtt, two-channel switches 19i and 192 19gp of nodes 20, and 20j, ... 20, and 20 ,, controlling the mode of two-channel switches according to the law of change of signs of the corresponding even and odd functions of a given basis, integrators 21i and 21 2, ... 21 „. |, And 212p, the first and second nodes 22, 22, ...

2n-1 gp 2. - 23. (23g of memory, respectively, block 24. And the control inputs of which are connected together and connected to the control input of the unit, the main outputs 25, and 252 devices, a functional converter 26 that performs one

 A -vB

Lp /

C "-f.2 ..., N), rt ° n

3 in the case of a trigonometric basis, or operation

, B, (PI, 2, ..., Y-),

in the case of any other basis, additional outputs are 27 devices.

The device works as follows.

The analyzed signal with a repetition interval T through the input I and the scale unit 2 is fed to the signal inputs of the adjustable frequency divider 3, the adjustable frequency multiplier 5 and the converter 8 of the original signal.

From the oscillations obtained as a result of division of the repetition frequency of the original signal a specified number of times in the adjustable divider 3 frequencies, clock 4 pulses are generated in the shaper 4, which are fed to the information input of the reversing commutator 9 vertical channels, and from the oscillations obtained as a result of multiplying the repetition frequency

the source network at a specified number of times in the 1rt1 adjustable frequency multiplier 5, in the imaging unit 6 of the origin pulses, reference pulses are formed, which are fed to the information input of the control unit 7.

Then, by the action of the reference pulses of the control unit 7 of the initial converter, the signal at the moment of the start of each reference pulse simultaneously stores and reads up to the beginning of the next reference pulse one instantaneous value of the original signal. As a result, a copy of the signal with a repetition interval (nm + l) T is formed at its output, which is fed to the signal input block 13 of the selection.

Under the influence of clock pulses, the reversing switch of 9 vertical channels, the forward and reverse moves of which are controlled by the vertical channel switch mode control unit 10, produces interrogative pulses that are fed to the vertical inputs of the selector unit 13. At the same time, under the influence of the interrogation pulses of the reversing switch 9 vertical channels, removed from its first and last outputs, the reversing switch of 11 horizontal channels, the forward and reverse moves of which are controlled by the block 12 of the control of the reversible switch of the horizontal channels, produces interrogation pulses that arrive on the horizontal entry block 13 selekish. At the same time in time on the vertical and horizontal inputs of the selection selection block 13 of interrogation pulses of the reverse switch 9 of vertical channels and the reversing switch 11 of horizontal channels, the corresponding control outputs and signal outputs of the copy selection block 13 appear on the corresponding control outputs and the block And the distribution goes to the corresponding control and signal inputs 2n

, computing blocks 16, and 162 -.-, jl b as a result of this sampling of a copy of the signal, passage through groups 17i and 172, ... 172f ,. and, weighting resistors, multi-input phase-inverting nodes ISi and 182, ... IS and dual-channel switches 19) and 192, ..., 2g, the operation modes of which are controlled by nodes 20i and 202, .. gp mode control according to the law of changing signs of the corresponding even and odd functions of a given basis, are integrated in integrators 21) and 212, ... 21

and 212 „with

gp-reset.

After expiration of the time interval (nm + l) T, the interrogation pulse from the first channel of the reversible switch 11 horizontal channels starts the control unit 15.

The pulses produced in the control unit 15 are fed to the control inputs of the driver 4 clock pulses, integrators 21, 212, ... 21 2 ,. 21211. With the reset of the first and second nodes 22, 222, ni in 23 |, 232 ... of the memory and block 24 elements I. After resetting the accumulated values in the integrators 21i, 212, sn-i 212f, the shaper of 4 clock pulses opens, and the clock pulses again begin to arrive at the information input of the reversing switch 9 vertical channels. As a result of this, the described cycle repeating the Fourier coefficients is repeated.

After rewriting to the second nodes 23t, 232, ... 23 h 23, j, the memories of the fixed

 in the first nodes 22i, 222, ... h 22g of the memory in the accumulated values, the latter are again transferred to the tracking mode for the accumulated values in the integrators 211, 212, ... 2l2f) -i in Od} with time, the second nodes 23) , 232, .- In-L memory is transferred from the mode of writing new values to the mode of their reading through the block 24 of the elements AND to the main outputs 251 and 252 of the device and through the block 26 of the functional conversion, the additional outputs 27 of the device.

The invention makes it possible to significantly improve the accuracy of calculating the Fourier coefficients of repeating sigals and high-frequency filling signals when displaying these signals.

Fourier series in any given basis of functions due to conversion of the repetition frequency (or carrier frequency) of the sital to the lower frequencies without using a reference frequency source. As a result of this, “yuvyshaets. the reliability of calculating the Fourier coefficients in a given basis of functions and expands the scope of application of the device, which leads to an improvement in its technical and operational characteristics.

Claims (2)

1. Authors certificate of the USSR N 480993, G 01 R 23/16, 1973.. 2. USSR author's certificate N 456226, G01 R 23/00, 1973. /five I urn