SU643861A1 - Multichannel device for interfacing message sources with digital computer - Google Patents

Description

to the third input of the control unit, the output of the control unit is connected to the input of the switching control unit, the output group of which is connected to the control inputs of the second switches of the respective channels, the outputs of the second channel switches are connected to the corresponding inputs of the input group of the memory block, the output of the address generation unit is connected to the second the input of the memory unit and with the code inputs of the first channel switches, the output of the register is the position of the channel queue number connected to the corresponding input of the group of inputs of the control unit switching and with the corresponding input of the first group of inputs of the block forming the position number of the queue, the outputs of the first group of outputs of the control unit are connected to the control inputs of the first channel switches, the outputs of the second group of outputs of the control unit are connected to the control inputs of the third channel switches, the outputs of the third group of outputs of the block control units are connected to the second inputs of the registers position number of the channel queue, the outputs of the fourth group of outputs of the control unit are connected to the third inputs register position in the queue channel numbers, code inputs of third switches connected to the output channel number queue position forming unit.

The prior art device arranges messages that arrive sequentially at random times, and a queue is organized in which messages are arranged in the order of arrival. However, in all known interfaces, it is not possible to change the order of the messages in the queue depending on the importance of the information contained in the message. While messages often differ significantly in the importance of information, this must be taken into account when determining the order in which messages are output in a digital computer. Such a situation may arise, for example, when controlling several objects using a single digital computer, when it is not possible to constantly give preference to any of the objects, but at each moment of the burden it is necessary first of all to exert a controlling effect on the object that is in the worst. management conditions.

Thus, the main drawback of the device is limited functionality.

The purpose of the invention is to extend the functional possibilities by dynamically changing the order of issuing messages.

The goal is achieved in that the device contains a priority code generation unit, and B each channel has a priority register and a fourth switch, the input and output of the priority code generation unit respectively connected to the first device input and to the code inputs of the fourth channel switches, the control inputs of the fourth switches channels are connected to the outputs of the first group of outputs of the control unit, and the outputs of the priority registers of the channels are connected to the inputs of the second group of inputs of the number generation unit by itsii queue.

The block diagram of the device is shown in the drawing.

The multi-channel device for interfacing message sources with a digital computer includes an address generation unit 1, a memory unit 2, a switching control unit 3, a priority code generation unit 4, a control unit 5, a queue position number generating unit 6, channels 7-J-9 each of which contains channel register 10, priority register 11, channel queue position register 12, channel switches 13.1.16. Positions 17, 18 in the drawing denote device inputs, position 19 — device output, positions 20–23 of the output unit groups of the control unit, 24, 25 — input groups of the generating unit for the position number of the queue, position 26 — output of the control unit.

The address generation unit 1, based on the address information received from the memory unit 2, generates the address of the free cell of the memory unit 2, and can be implemented as a program-controlled automaton or as a functional automaton.

The memory unit 2 performs the functions of a random access memory for storing incoming messages.

The switching control unit 3 is a combinational circuit where the codes stored in the channel registers are compared and a signal is sent to one of the 16 channel switches 5 connected between one of the 10 channels registers 7-9 (namely, where the message sign is stored, which is in the first position of the queue and memory block 2. The message sign is the address at which this message is stored in memory block 2. The message sign is entered in the registers 10 of the Jd channels through the switches 13. Forming unit 4 priority code depending on the content, the message generates a priority code, and can be implemented as a combinational circuit. The priority code assigned to the message is stored in the corresponding register 11 of channels 7.9, where it is entered through the corresponding switches 14. Block 6 of forming the queue position number based on the analysis of priority codes stored in registers 11 of the channels 7-9 and the code numbers of the queue position numbers The 12 channels stored in the registers produce the values of the queue position numbers. Block 6 can be implemented on the combinational circuit. The device operates in two modes. The first mode is realized when a message arrives at input 17 from the source and has a chain of setting the incoming message to a place in the queue in accordance with the state of the queue at the time of arrival and the importance of the information contained in the message. The status of the queue is determined by the number of queued messages and the priority codes (importance) of these messages. The queue status code is removed from the output of block 6. The second mode is implemented when a message is sent to the input 18 of the call service signal, which stands in the first place in the queue. In the first mode, the device functions as follows. Block 1 generates the address of the free cell of memory 2. At this address, the message code is recorded in memory block 2 and stored there for the entire time in the queue. At the same time, block 4 generates a priority code. The incoming message also affects the control unit 5. In accordance with the signal coming from block 6, the control unit 5 generates: 1 1. On outputs 20, control signals that write the address code and the priority code of the message that has come into the free registers 10 , 11 channels 7 -; - 9; 2. at outputs 21, control signals that write the position number of the queue to the corresponding register of 12 channels 3. at outputs 23, control signals that reduce by one the number of positions of the message queue whose priority is lower than the priority of the next message. At this point, the queuing of the message ends. The operation of the device in the second mode starts upon arrival at the input 18 of a signal from the digital computer, which acts on the control unit 5. At the same time, the control unit 5 generates sequentially: 1. At output 26, a control signal acting on unit 3, at one of the outputs of which in turn, a control signal will appear if the state of the corresponding register 1O on channels 7-79 corresponds to the first position of the queue. This signal goes to the corresponding switches of 16 channels. At the same time, the address of the message, which is in the first position of the queue, goes to memory block 2. At this address, a message code is output from memory block 2 to output 19; 2. At outputs 22, control signals that increase the position numbers of the queue in the occupied registers of 12 channels 74-9 per unit. Such a change in the number of positions of the queue means the promotion of the queue. One of these signals translates the corresponding register 12 in one of the channels 74-9 to an idle state. Thus, the invention makes it possible to extend the functionality of a known device by dynamically changing the order of issuing messages to the output of the device. This positive effect is achieved by introducing the priority code generation unit and its connections, as well as by introducing the priority register and the fourth switch into each channel of the priority register device.

Claims (1)

1. USSR author's certificate number 516031, cl. q 06 F 3/00, 1973. 2, USSR author's certificate jVo 489100, cl. Q 06 F 3/00, 1975.