SU600740A1 - Arrangement for coding information by cyclic code - Google Patents

Description

The ports of which are connected to the outputs of the corresponding bits of the operational register.

The block diagram of the device shown in the drawing.

The device for encoding information with a cyclic code contains an operational register 1, an adder 2 modulo 2, the first element PI 3 and a group of elements OR 4 for assigning to the operational register 1 a generating polynomial as a result of the previous coding cycle, the second group of elements AND 5 for submission of the result of operations above the next line to the register register 6, unit 7 of Uiravleia, the AND element 8 for analyzing the walling of the polynomial located on the operational register.

The drawing shows a device for coding, in which information is stringed by strings to an operational register. The input data buses are connected to the operational register 1, starting from the 1st bit but the mth (each line of information Fi (x} contains bits).

Oneritative 1 and memorizing 6 registers contain on t bits (from 1st to tpth in the operational and from 0th to t-1th in the storage). Due to the fact that the information line Fi (x) is taken from bits 1 to 2, it can be considered that there is a code corresponding to xFi (x) in the operation register register. By shifting the links of the coding of the result of the previous Ri-i (K) line from the storage register 6 to the operational register 1 one bit to the left, it is possible to combine the multiplication and computation operation with the addition operation.

xF; (x -f xRi-i (x) Ri (x mod e (x), (1)

where g (x) is a generating polynomial;

Ri (x) is the remainder of dividing the processed line by the polynomial g (x).

Since the right part of the expression (1) in the lower section always has a zero, the g (x) (output of the control element AND 8) is connected directly to the input of the lower digit of the storage register 6, on which the remainder Ri (x) is stored.

The control unit 7 has four outputs, the signals from which control the operation of the device: 9- Q: jR "-i (l), 10 - transfer, 11" check and 12 "pulse of tracking the co-roll amount. Output 9 is connected to the elements And 3, output 10 to the elements And 5, output And to the control element And 8.

If the contents of the high order register 1 (2 ™) 1, then the degree of the right-hand side of expression (1) is equal to the degree of the generating polynomial, the element AND 8 is open and the inputs of the element OR 4 have a pulse. Since the device operates on a specific communication channel with well-defined noise characteristics, having a certain number of transmissions (tape tracks), then the output wiring of the element AND 8 into elements

OR is constant and corresponds to the structure of the generating noliom.

The contents of the low-order bit Ri (x depends only on whether the summation and the polypg g (x) is applied to the summation or not, since the left-hand side of expression (1) in the low-order bit always has bullets. Therefore, the g (x) bus (output 8) is connected directly to the input of the youngest bit of the memory register 6.

The device works as follows.

Operational register 1 receives the message string, after which the control unit 7 is activated. It gives nosledovogo pulses:

„(

(from exit 9), “check (from exit 11),“ transfer (from exit 10). Respectively, the following operations are carried out: addition according to the right part of expression (1), verification of the wall of a polynomial, buttop on operational register 1, addition of the contents of operational register 1 with the polynomial g (X :), if the contents of the leading bit of operational register 2 ™ 1, transmission of the received the remainder of the memory register 6. After issuing the pulse, the transmission and control unit is switched on.

This cycle repeats on every line. At the last nth row, control block 7 provides two additional impulses:

- D f v

net A / -.

(e output 9), according to the first of these, the transfer of Rn (x) from the storage register 6 to the operational 1 (the last should be the pre-obiulea). The second pulse is output to the device encoded for

signaling that the current register of the register is the result of coding the entire message.

Thus, all encoding operations are carried out with all the bits of the string at the same time, which improves the performance of the encoder n, respectively, of the transmission device as a whole.

Claims (2)

1. USSR author's certificate number 328461. cl. G 06F 11/12, 1970. 2. USSR author's certificate number 335691, cl. G 06F 11/10, 1970.