SU599328A1 - Arrangement for shaping linearly switched frequencies - Google Patents

Description

(54) DEVICE FOR FORMING LINEAR SWITCHED FREQUENCIES

the modulation unit moves are connected to the input of the third common element NAND, the output of which is connected to the input of the second counter, the output of the element is NOT connected to the inputs of the second. and of the third common NAND elements, the output of the first common NAND element is connected to the input of the modulation unit.

FIG. 1 shows a functional diagram of an apparatus for forming linearly switchable frequencies (for example, n m I 3 is adopted); in fig. 2 - timing diagrams of voltages at the outputs of the main nodes of the circuit.

 , A rectangular oscillation with a period At is applied to the input of the p-ramp dthy trigger counter 1 connected to the input of the device (see Fig. 2a). Forms of voltage on 11r l :) 1. The triggers of the triggers of the counter 1 are shown fiii of FIG. 2 o, v, g. From the forward and reverse outputs of the n-bit counter triggers on the arrays of meters: m. Into two groups of the f.vlipyu L1 x -L-ionts AND-NOT 2 and 3 (second and first group) OiHif from the inputs of each of The element (IN AND IS NOT W () K) of the group is connected to the keys iri-peK.iiioiarcciH 4 (second switch), on which HtiOHpaeiCH the rate of frequency change. If the PS elements of the NAND 2 are open (the left position of the k. Switch), then their outputs contain voltages, the form of which is shown in FIG. 2 d, e, g. In the event that any of these elements is closed (the right position of the corresponding key), then its output is in the state of logical one. All the l outputs of the second-group AND-HES elements are connected to the n inputs of the common element AND-NOT 5 (the second common element), to (n + 1) the input of which is fed to the input rectangular oscillation inverted with the help of the HE 6 element. For convenience, this (n + 1) input is not considered at first, and it is assumed that element 5 is an AND element at n inputs. Depending on whether the keys of the switch 4 are closed or open, they have different output signals. FIG. 2h, and, k, l, m their view is shown for five successive positions of the keys 111, 110, 101, 100, (in. If we now take into account (n + 1) -th input of element 5, then for the time equal to the period (T) of the oscillation shown in Fig. 2h, its output for the above five positions of the keys of the keyboard passes, respectively, 1, 2, 3, 4, 5 pulses arriving at (nf 1) - This input. The number of pulses at the output of element 5 over a period of 2it is generally equal to the number dialed by pa of switch 4 in the return code, plus one, and Fig. 2n shows the sequence of pulses in the element 5, AND-NOT, when the switch keys have positions 011 (hence the number of pulses per period: 011 + + 001 00-fOOI 10b 5, o).

Thus, having an n-bit divider 1 (1st counter), it is possible to provide a grid of following frequencies and pulses with 2. average, frequencies from 2 f, to c. The subsequent division of summed pulses e by means of a 1-bit divider 7 (the third counter) improves the regularity of the rectangular oscillations and increases the level of the first harmonic. FIG. 2o, seven periods of oscillation are shown at the output of the counter 7 (1 3) when the pulse sequence shown in FIG. 2n.

The output of counter 7 is connected to the input of an n-bit trigger switching counter 8, which controls the AND-NOT logic elements 3. Using switch 9 (first switch), a number defining the initial frequency value is written to counter 8. Each pulse arriving at the counter input changes the frequency value by one step and the switching speed depends on their frequency. The n-input element IS-NOT 10 (the first common element) performs the same functions as element 5; the difference is that it has no (l + 1) -th input. The elements 2,3,7,8, n, (j and 10 make up a frequency synthesis block.

The logical elements AND-NOT AND 12, the inverter 13 and the switch 14 (the third switch) provide a change in the frequency either towards its increase or decrease.

Consider the case when the element 11 is open, the element 12 is closed (the upper position of the switch 14), the triggers of the switching counter 8 are set to the state 000, and the oscillation shown in FIG. 2o

Since the elements 3 are connected to the inverse outputs of the triggers of the counter 8, at the output of the element 11 at the beginning (until the state of the triggers of the counter 8 changes) there will be an oscillation shown in FIG. 2h, then (after the low trigger of the counter 8 triggers), shown in FIG. 2i, and so on. FIG. 2n. The oscillation at the output of element 11 is shown for the case under consideration, and FIG. 2p is the total pulse sequence at the output of the AND-HE 5 (third common) element. It can be seen that the number of pulses in it increases linearly with time. Elements 11, 12, 13, and 15 constitute a modulation unit. The pulse sequence from the output of the modulation unit is applied to the t-bit trigger divider 16 (second counter). FIG. 2c shows the oscillation at its output length. The same oscillation, only compressed four times in time, is shown in FIG. 2t. Using the band-pass filter 17, the first harmonic of the synthesized oscillation is extracted. Counter 16 and filter 17 constitute a frequency division and filtering unit.

When translating switch 14 to the lower position, element 12 is opened and element 11 is closed. The oscillation at the output of element 12 will be inverted with respect to that shown in FIG. 2n. The number of pulses at the output of element 15 in this case decreases linearly with time, which leads to the device synthesizing a linearly decreasing frequency.

If frequency switching is required to produce only one, the maximum possible

speed, the device is substantially simplified. In this case, the switching of the counter 8 is carried out directly by the oscillation taken from the direct output of the last trigger of the n-bit counter 1 (the upper position of the switch 18) of the fourth switch. The one and a half period resulting from this oscillation is shown in FIG. 2nd (its scale is also compressed four times). Switches 4, 9, 14 and 18 constitute a programming unit.

In the general case, the device described allows to obtain 2 different frequencies from f nf. f,; 2 to fi.b, K L, by steps through rff ,, fs, and stepwise linearly increase or decrease the frequency of the output oscillation with 2 different speeds from step

By the qyumi GKPPPGTI lU-.1U, a / g -f - 2 9 g „I: kami speed --- --- - в formation of the required number of pulses at the outputs of common elements 5 and 15 in the device is not directly summed. differentiation of pulse sequences with multiple frequencies, and by gating input pulses fed to the input of elements 5 and 15, using preformed gating pulses, which feed into the other inputs of the AND-NOT elements 5 and 15. This avoids distortion, caused by unequal delays in formation cascades and improve performance and reliability. In addition, this method of formation allows one to dispense with a reversible counter for providing both a linearly increasing and a linearly decreasing frequency change.

Claims (2)

Invention Formula Device To form linearly switchable frequencies, containing the first counter, the input of which is connected to the input of the device connected to the input of the element NOT, the first group of elements AND-NOT, the input of each of which is connected to the inverse output of the corresponding bit of the switching counter, the outputs of elements AND-NOT the first 5 groups are connected to the inputs of the first common element NAND, the control inputs of the switching counter are connected to the outputs of the first switch, the second group of elements NAND, the input of each of which is connected to The corresponding output of the second switch, and the outputs are connected to the inputs of the second common element AND-NOT, the modulation unit, performed on the elements AND-NOT, the inputs of which are connected to the outputs of the third switch, the second counter, the output of which is through a band-pass filter connected to the output of the device, the third the counter, the third common element is NOT 2 Hz 1C fourth switch, characterized in that, in order to expand the field of application, the inputs of each K th element of the NAND of both groups are connected to the direct output of the k th bit and  by inverting the input of each i-ro bit of the first counter (where), the output of the second common element is NOT connected to the input of the third counter, the outputs of the first and third counters are connected via the fourth switch to the input of the switching counter, the outputs of the modulation unit are connected to the input of the third common element NAND, the output of which is connected to the input of the second counter, the output of the element is NOT connected to the inputs of the second and third common elements NAND, the output of the first 0 of the common element is NOT connected to the input of the modulation unit. Sources of information taken into account in the examination: 1 Kotov VS, Radio Engineering, vol. 26, No. 5, 1971, p. 64. 2. “Equipment for frequency and time measurements, ed. A. P. Gorshkova, M., “Owls. Radio, 1971, p. 278-280. Bibiwd ABOUT TJTJTJOJnjTJTJ-UTJTJTJTJTJTrUTJT s in z de 3 and k lmn Lj