SU552715A1 - Pulse code demodulator for a telephone channel of a radio relay station - Google Patents

Description

one

The invention relates to radio engineering and can be used in low-channel radio-relay stations with temporary compaction of telephone channels.

A pulse code demodulator for a telephone station of a radio relay station containing a quantizing pulse generator is connected to a binary counter, the output of which is connected to a storage capacitor via a quantized pulse width modulation (PWM) driver and an amplitude pulse pulse shaper. modulation (LIM) connected to the low frequency shaper 1.

However, the known demodulator has insufficient demodulation accuracy in multi-bit decoding.

The purpose of the invention is to increase the accuracy of demodulation in multi-bit decoding.

For this, a pulse code demodulator for a telephone channel of a radio relay station containing a quantizing impulse generator connected to a binary counter, whose output is connected to a storage capacitor via an erase-pulse quantized pulse shaper modulations

(AIM) connected to the low-frequency signal shaper, an additional binary counter and a quantized pulse shaper PWM are inputted in series, the output of which is connected to a storage capacitor, and the input of an additional binary counter is connected to a generator of quantizing pulses. FIG. Figure 1 shows the structural electrical circuit of the proposed demodulator; in fig. 2 - signal plots explaining his work.

The demodulator contains a generator of 1 quantizing pulses connected to the input of an additional binary counter 2 and to the input of the main binary counter 3, the output of which is connected through the shaper 4 of a quantized PWM pulse to the storage capacitor 5, the erase key 6 and the shaper 7 AIM, which, in their queue connected to the driver of the 8 low-frequency signal. A quantized pulse PWM shaper 4 includes a shaping trigger 9, a stabilized generator 10

current and clock valve I. The output of an additional binary counter 2 is connected to the input, an additional generator 12 is a quantized impulse PWM, which includes a forming trigger 13, a current generator 14 and

current valve 15. The output of the additional driver 12 is connected to the storage capacitor o, and the input of the additional binary switch 2 is connected to the generator 1 of quantizing pulses.

The pulse code demodulator operates as follows.

The received l-bit code word is preliminarily recorded in two binary counters 2 and 6. The lower bits of the 1st to ffth code word are recorded in the n-bit counter 2, and the high bits from the () they are recorded in (n-j-bit counter 5. with the synchronization pulses (see FIG. 2, a) the generator of 1 quantizing pulses is started (see fig. 2, o), the frequency of which is reduced in 2 times, as well as the forming triggers U and 15, which generate the PWM pulses (see Fig. 2, в and -2, d). The quantizing pulses of a reduced frequency follow. at the same time the inputs of counters 2 and 3. The overflow impulse (pA) -discharge counter 3 sets the forming trigger V to the initial state (CM. Fig. 2, c), and the overflow impulse / g-discharge counter 2 sets forming trigger 13 to the initial state (see Fig. 2, d). At the output of the forming trigger 9, a PWM pulse is formed (see Fig. 2, c), the duration of which corresponds to the code combination containing the higher (-k) high-order bits accepted n-bit code word. At the output of the forming trigger 13, a pulse of PWM is formed (see Fig. 2, d), corresponding to k. the younger ones will give the received l-bit code word. However, the duration of this PWM pulse is increased by 2 times, since the frequency of the generator of 1 quantizing pulses is reduced by 2 times.

During the quantized PWM pulse (see Fig. 2, c), the storage capacitor 5 is charged with a stabilized generator current (see Fig. 2, e) 10 through the open valve I to the Voltage, which displays the amplitude of the sample of the original low frequency signal with an accuracy of 2D where L is the quantizing step. At the same time, during the quantized PWM pulse, the storage capacitor 5 is additionally charged by the generator current 14 (see Fig. 2, e) through the open valve 15. The generator 14 current is selected in 2

times less than the value of the stabilized current of the generator 1U. K, end: a cycle period on the storage capacitor b, a voltage is formed (see Fig. 2 g, 3j proportional to the received -discharge code word. At the end of the cycle period, the voltage on the storage capacitor 5 is read by the driver 7 in the form of AIM pulses, after which the storage capacitor

5 is discharged to the initial potential with a razor of the erase key b controlled by synchronization pulses. Output shaper 8 (see Fig. 2, and) low-frequency signal converts the pulses of the PIM in the low-frequency signal.

Thus, the proposed device decodes the signal at a reduced counting frequency by 2 times. As a result, the speed requirements for the quantizing pulse generator 1, as well as for the double counter, are sharply reduced.

Claims (1)

1. Katermol K.V., Principles of Pulse Code Modulation. M., “Holy, 1974, p. 304 (prototype). "L - t FIG. 2