SU531269A1 - Pulse shaping device - Google Patents

Description

one

The invention relates to a pulse technique, can be used to modulate pulse sequences in the linear paths of the pulse code modulation systems.

A device for forming packs of pulses with high-frequency filling is known, triggered by applying to the control inputs external pulses arriving at different points in time. The duration of the high-frequency pulses is equal to the duration of the trigger pulses, and the frequency depends on the amplitude of these pulses. This device contains a trigger pulse amplifier, an OR gate and a carrier frequency generator, the value of which varies depending on the amplitude of the control voltage from the logic pin II.

However, this device does not exclude the occurrence of short pulses that interfere with devices operating in the linear paths of the pulse-code modulation systems.

It is also known a device for forming bursts of pulses comprising a block with two paraphase outputs, a generator

2

the clock frequency, the output of which is connected to the input of the clock divider and, through a delay line, to one of the inputs of the gating unit; To the other input of the gating unit, the output of the OR element is connected, the inputs of which are connected to the outputs of the matching circuits 21.

However, this device is not sufficiently robust when asynchronous modulating and clock pulse sequences

The purpose of the invention is to improve the noise immunity in the asynchronous modulation and clock sequences,

Claims (2)

The proposed device for forming bursts of pulses, containing a block with two paraphase outputs, a clock generator, the output of which is connected to the input of a clock divider and, through a delay line, to one of the inputs of the gating unit, the output of the OR element, whose inputs are connected to another input of the gating unit with the outputs of the coincidence circuits, it is characterized in that two additional lines of the fence and two additional triggers are introduced into it, each of which contains counting and separate inputs. The counting input of one of the flip-flops is connected to the output of the clock generator connected to the inputs of the clock divider, the delay line and the input of one of the additional delay lines, and the counting input of the second trigger is connected to the output of the clock divider and the input of the second additional delay line, separate inputs the triggers are interconnected and connected to the paraphase outputs of the block, the outputs of the triggers and additional delay lines are connected to the inputs of the matching elements. FIG. 1 is a functional diagram of this device for forming pulse bursts; Fig. 2 shows timing charts explaining the operation of this device. The device contains a unit 1 with two paraphase outputs, a clock frequency generator 2, the output of which is connected to a clock frequency divider coder 3 and, via a load line 4, to one of the inputs of the gating unit 5. The output of the element 6 is connected to the other input of the gating unit 5 which are connected to the outputs of the matching elements 7 and 8. In addition, the device contains two additional delay lines 9 and 1 O and two triggers 11 and 12, each of which contains counting and separate inputs. The counting input of the trigger 11 is connected to the output of the generator 2, connected to the inputs of the divider 3, delay line 4 and to the input of the additional delay line 9. The counting input of the trigger 12 is connected to the output of the divider 3 and to the input of the delay line 1O. The separate inputs of the trigger 11 and 12 are combined and connected to the paraphase outputs of block 1. The outputs of the trigger 11 and 12 and delay lines 9 and 10 are connected to the inputs of the matching elements and 8. The device operates as follows. Signals (direct and inverse) from the node (Fig. 2 a, b) are fed to the separate inputs of the flip-flops 11 and 12. Modulating signals with a certain clock frequency are created in the generator 2 (Fig. 2c). In the divider 3, the clock frequency is halved (Fig. 2d). The signals from generator 2 and divider 3 are fed to the counting inputs of triggers 11 and 12, respectively. Switching of the flip-flops occurs when a pulse is applied to one of the separate inputs and OTs, and the clock of the clock pulse at the counting inputs (Fig. 2e, e). The modulation occurs in the coincidence elements 7 and 8, on the outputs of which there are only whole pulses (Fig. 2g, h). These pulses are sent to the element OR 6 (Fig. 2 and ;, and from its output modulated, the lvac pulse sequence arrives at one of the inputs of the gating unit 5, to the other input of which the signal from the generator 2 goes through the delay line 4 (Fig. 2 to At the output of the gating unit 5, all pulses have the same duration (Fig. 2n). Formula of the device forming a bursts of pulses, containing a block with two paraphase outputs, a clock generator, the output of which is connected to the input of the clock divider and through l Delay of one of the inputs of the gating unit, the output of the OR element is connected to the circular input of the gating unit, the inputs of which are connected to the outputs of the coincidence circuit, characterized in that, in order to improve noise immunity during the asynchronous modulating and clock pulse sequences, and two additional flip-flops, each of which contains counting and separate inputs, the counting input of one of the flip-flops is connected to the output of the clock frequency generator connected with inputs of the clock divider, delay line and with the input of one of the additional delay lines, and the counting input of the second trigger is connected to the output of the clock divider and the input of the second additional delay line, separate inputs of the triggers are interconnected and connected to the paraphase outputs of the block, outputs of the trigger and additional delay lines are connected to the inputs of the matching elements. Sources of information taken into account in the examination of the invention: 1. Japan Patent No. 2686, cl. 98 (5) D 22, 1966. 2. Gurevich, V.E., et al. Pulse-code modulation in multichannel telephone communications, 1973, Izd-vo Svy, p. 140, fig. 5.45. ig. -I GI ...., J .. PhGGP r; i -L ..