SU526934A1 - The converter of an angle of rotation of a shaft in a code - Google Patents

Description

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The invention relates to the field of automation and computer technology and may be used to interface sensors and rotary-type calculating elements with digital computing devices and machines for various purposes.

Converters of the angle of rotation of the shaft into a digital code are known, including converters in which the angular position of the shaft is converted by means of functional sensors into an intermediate analog value, such as phase shift and; w voltage, followed by conversion and last into the angular position code of the shaft. As such sensors, various phase shifters are most often used, and in the first place rotating transformers of high accuracy class, since they are quite simple, provide high accuracy, are reliable in operation, are noise-resistant, and can be placed at a large distance from electronic units 1 and 2 .

However, such converters have low accuracy.

The closest to the technical essence of the invention is a shaft rotation angle transducer into a code containing a sequential emitter generator, a "-disable binary counter, a sinusoidal voltage driver, a phase shifter and an angle-to-phase transducer, the first output of which is connected to the first input of the metal elements "And, to the second input of which is connected" -discharge binary counter 3.

This transducer is practically unable to ensure high accuracy of the conversion under conditions of its daily operation, especially in those cases when the constancy of the external conditions of its work cannot be created due to some circumstances or other. This is due to at least two reasons. First, the output code of the transducer angle is determined by the temporal position of the phase pulse, produced in the extraction unit and the formation of the phase pulse at the moment of the sinusoidal voltage transition from the output of the phase shifter from its negative to positive values, and therefore as the appearance of distortion of the voltage form, so and the instability of the operation of the voltage comparison elements in the block is highlighted; and formed; phase impulse leads to additional displacement of the phase impulse, and consequently, conversion errors. Elimination of the causes of these errors, especially the second one, is technically difficult and can be done using special highly stable elements and a complicated complication of the transformer circuit.

Secondly, due to the fact that during the rotation of the input shaft of the converter, the phase

the pulse shifts in time continuously, and therefore it can occupy any position relative to the pulses of the converter's own generator, the instability of the duration of the phase pulse and the generator pulses can lead either to the loss of the removal of the angle code pulses from the counter, or to the appearance of two (or more) pick pulses, which undoubtedly leads to a malfunction of the converter and additional errors. Stabilization of the duration of the phase pulse and sushi generator pulses, naturally complicates the converter circuit.

The purpose of the invention is to improve the accuracy of the converter.

This is achieved by introducing delay blocks, registers, a comparison block, blocks of n and "I" elements into the proposed converter, a first input of a block of n "I" elements connected to the output of an n-bit binary counter, and a second input to the second output converter tl to phase, which through the first delay unit is connected to the first input of the unit / g + 1 elements "And and to the second delay unit, the output of which is connected to one of the inputs of the registers Comparison unit and to the inputs tvetstvuyush.ih bits adder, the most significant bit input connected to the output of comparison block, the adder output being connected to the second input of the block / r + 1 elements "I.

The angle-to-phase converter is VAYe-filled in the form of a limiter-normalizer, for example, according to the circuit of a current switch, a trigger, whose inputs are connected to the direct and inverse outputs of the limiter-normalizer and through a second delay element with the generator output; and two “And” elements, whose inputs are connected directly and through the third and fourth delay elements with the direct and inverse outputs of the trigger.

The drawing shows a functional converter circuit .ma.

A shaft rotation angle converter into a code circuit comprises a master oscillator 1, a binary digit counter 2, which generates signals of the converter reference cycle and the current phase code of this cycle, shaper 3 sinusonalm voltage supplying the phase shifter; F: An inverter 4, which converts the angle of rotation of the shaft into a sinusoidal phase shift; 1, an angle-to-phase converter 5, executed as a limiter, normalizer 6, trigger 7 with input logic, delay elements 8, 9 and 10, and two elements “And and and 12; blocks 13 and 14 of the And elements, which remove the codes from counter 2 by the phase pulses of the converter 5; registers 15 and 16 storing the readings for the duration of the calculation of the output angle code, the adder 17 performing the calculation of the output angle code; comparison unit 18 compares the high bits of the adder's input codes; block 19 of the elements "And the issuance of the output code of the transducer and blocks 20 and 21 of the delay.

The converter works as follows.

The pulses of the master oscillator 1 are continuously calculated by the binary-digit counter 2, which cyclically changes its state from zero to zero (the beginning of the cycle) to a maximum equal to (the end of the cycle).

In the driver 3, the sinusoidal voltages and the rectangular impulses of the higher bits of the counter 2 are generated, for example, by means of the former, a system of phase-shifted sinusoidal power supplies of the phase shifter 4.

The initial position of the input shaft of the converter and the positive direction of its rotation are chosen so that the phase difference between the output voltage of the phase shifter 4 when it is represented by the cosine function and the cycle of the counter 2 is exactly equal to the angle of rotation of the input shaft of the converter. In this case, when the output voltage passes the phase shifter of the zero phase of its cycle, i.e., its maximum positive value, the code of the current state of the binary counter is exactly equal to the angle of rotation of the converter input shaft.

However, in a predictable converter to increase its accuracy and stability, the output angle code is not formed by removing the current code from a binary counter to the output of the phase voltage of the zero phase of its cycle, as in all known converters, but by averaging two codes taken from a binary counter by two phase pulses located symmetrically with respect to the moment of flow through the output of the phase shifter of the zero phase of the cycle (in this case its maximum value u) and formed by the beginning and end of the phase of the primary pulse produced by double limiting cosinusoidal voltage. At the same time, an increase in the accuracy and stability of the converter is ensured by the fact that both the pestability of the cosine-voltage limiting levels and its symmetrical distortions (distortions caused by cosine-harmonic higher harmonics) result in a symmetrical change in the position of the phase pulses and the codes they produce, preserving their average value is constant.

Two-sided limiting of the cosinusoidal nanoparticles from the output of the phase shifter 4 with simultaneous amplification and normalization (reduction to unit and zero levels of the logic elements used in the device) obtained with limiting signals is carried out in limiter-normalizer 6 of the angle-to-phase converter 5.

The limiter-normalizer & is made on the circuit of the current switches and has two outputs - direct and straight; as a direct cl. j etc, the output on which, with a positive half-wave of the input cosine voltage, a single level signal is formed (this signal is called a nervous phase pulse). With a sufficiently high gain of the current switches, the shape of the primary phase pulse is nearly rectangular.

Due to the continuity of the input source pre-explorer angle, and therefore the output phase voltage of the razdapfatel Tsg, the beginning and the number of nervous phase waves, take any position relative to the pulses of the generator 1, ii, therefore, to eliminate errors from the counter 2, primary phase pl-pulses are normalized by position. The recognition is carried out by the well-known sioozoi and consists in the fact that the direct and the primary values of the primary phase pulses, taken from the direct and inverse outputs of the limiter b, are fed to the first inputs of the corresponding elements "And the input logic of trigger 7, to the second inputs which are delayed by the delayed element 8 of the generator 1. The pulse offset value is determined by the transition time of the counter 2 from one state to another and, in the first approximation, is equal to half of the period they follow. In this case, the trigger 7 passes from the zero state to a single by the first delayed pulse of the generator, following the start of the primary phase pulse, and returns to the zero state by the first delayed generator pulse, following the end of the primary phase pulse. The normalized primary phase pulses removed from the outputs of trigger 7 with an accuracy of the pulse repetition period of generator 1 repeat the unnormalized primary phase pulses generated by limiter normalizer 6, but their beginning and end are always located exactly between the generator 1.

The output phase pulses of the converter 5, which are used to pick up the codes e of the binary counter 2, are generated at the beginning and end of the normalized primary phase pulses by forming short signals from potential pulses of indefinite duration. The phase pulse at the beginning of the primary phase pulse — the first phase impulse — is obtained by logical logic on the element “AND a 12 forward normal mi-fied primary phase pulse with a delayed value delayed by element 10, and the phase pulse at the end of the primary phase pulse is the second the phase pulse is the logical time on the element “And 11 of the inverse value of the normalized primary phase pulse with the delay of its direct value delayed by element 9 of the delay 9”.

the first phase guide through the unit “i ibb removes the current value of the counter code m puts it on the register 15. Similarly, BTopoii phase) L ptülc via the unit e1smentov“ ii 14 removes the current value of the counter code and writes it to the BTOpoii register 16.

Averaging of the obtained codes is carried out by summing them on a columiuyator 1 adder 17 and decal 1: an all-inclusive result for two ways. The conditional fix applied to the youth code, which is thrown from the adder via block 19. The code is removed from the adder by the second phase. by the delayed by the block of delay 20 on the t.pichipu, necessary to interrupt transient modes in the adder

after filing the input of the code L 2 for its entry (after removal of the code from the adder by a pulse removal, delayed by 21 delays, send the ggs to reset the registers 15 and 16 to their original states). 13th 11 block code 19

is the output of the converter code.

The output code of the converter as a code code sum corresponds exactly to the angle of the input shaft only when the first and second phase pulses lie within one cycle of operation of the binary counter 2.

Formula and 3 about b ete e and p

The converter of an angle of rotation of a shaft in a code,

containing a series-connected generator, a “-discharge binary counter, a sinusoidal driver, a phase shifter and an angle-to-phase converter, the first output of which is connected to the first

input unit block elements "1-1, to the second. to the input of which a d-bit binary counter is connected, characterized in that, in order to increase the accuracy, delay blocks, registers, comparison block, blocks are entered into it

“1-1, the first input of a block of n elements” ii is connected to the output of an l-bit binary counter, and the BTOpoii input - to the second output of the angle-to-phase converter, which through the first delay block connected to the inertial block input / 1 + 1 of the elements “11 and to the second delay block, the output of which is connected to one of the inputs of the registrars, the outputs of the blocks are connected to

to the inputs of the comparison unit and to the inputs of the corresponding bits of the adder, the input of the higher bit of which is connected to the output of the block, the output from the mmator is connected to the second input of the i3 / gr of the “I.

Sources 1; information. bsimanne accepted for examination:

1.Avt. St. AO. G 08C 9/04, 17.05.72.

2. Avt. St. Up to 425197. G 08C 9/04. 04.01.72. 3. Auth. St. Up to 282702, G 08С 9/04, 05.30.69.

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