SU519698A1 - Signal synchronization device - Google Patents

Description

(54) DEVICE FOR SYNCHRONIZATION OF SIGNALS

nal INPUT of the third channel, the second signal output of which is connected to the third signal input of the first channel and the fourth signal input of the second channel, the second signal output of which is connected to the fourth signal input of the first channel and the third signal input of the third channel; each directory contains triggers, storage, compare, reset and write, first and second major elements, inverter, first, second, third, fourth, fifth, sixth, seventh, eighth and ninth elements AND, first and second elements OR, and the first input of the first element OR is connected to the first sign input of the channel and the single input of the sign trigger, the unit output of which is connected to the first input of the first major element and the second signal output of the channel, the third signal input of which is connected to the second input of the first m the primary element whose third input is connected to the fourth signal input of the channel, the second sign input of which is connected to the second input of the first OR element, the output of which is connected to the single input of the recording trigger and the first input of the first element And whose output is connected to the single storage trigger The unit output of which is connected to the first inputs of the second, third and fourth elements I, the outputs of which are connected respectively to the first input of the second major element, with a single input trigger The reset key and the zero input of the recording trigger, the unit output of which is connected to the second input of the first element And, the first signal output, the first and second signal inputs of the channel are connected respectively to the output of the second element And, the second and third inputs of the second major element, the output of which is connected to the first the input of the fifth element AND, the output of which is connected to the first inputs of the second element OR, KiecToro, the seventh and eighth elements AND, the outputs of which are connected respectively to the second input of the third element And, one the first trigger input and the first sign output of the channel, the information output of which is connected to the output of the fifth And element, the single output of the reset trigger is connected to the first input of the ninth And element, the output of KOTODoro is connected to the zero inputs of the sign trigger, trigger storage and comparison trigger, the zero output of which is connected to the second input of the second element AND, the zero output of the storage trigger is connected to the second input of the sixth element AND, the second input of the second element OR is connected to the single output of the trigger comparison The output of the first major element is connected to the second inputs of the seventh And element, respectively, through the inverter, and the eighth And element, directly, the third input

the first element And, the second input of the ninth element And, the second inputs of the fourth and fifth elements And, the zero input of the reset trigger is connected respectively to the first,

the second, third and fourth clock inputs. (and channel.

Figure 1 shows the block diagram of the device. Signal synchronization device

contains channels 1-3, each of which contains trigger 4 records, trigger 5 storage, trigger compare 6, reset trigger 7, mark trigger 8, elements AND 9-17, inverter 18, elements OR 19, 20, fry-like elements 21, 22.

In addition, the drawing shows: clock inputs 23-26 of the channel, z-nakovye inputs 27, 28 devices, information outputs 29 devices, sign outputs 30, 31 devices; the first 32, the second 33, the third 34 and the fourth 35 signal inputs of the channel, the first 36 and second 37 signal outputs of the channel.

The inputs 27, 28 receive asynchronous frequency relative to the clock signals,

moreover, the simultaneous arrival of these frequencies at the inputs 27, 28 of the device is switched off. Such frequencies characterize information coming from various types of sensors characterizing the change in parameters in

both sides, i.e., their numerical values can be null-positive and negative, the three final values being equal to the algebraic sum of the number of pulses arriving at the inputs 27, 28 of the device. Inputs 27,

28 are equivalent in principle to the processing of information arriving at them, with the exception of signals produced at the outputs 30, 31, which characterize the sign of the output information.

Thus, the device allows the input information to be synchronized and distinguished by the sign (it is assumed that the positive information is received at the input 27, and the negative information is fed at the input 28).

This advantage is achieved through the introduction of a sign trigger and AND, OR elements that produce reliable signs of reverse information.

In the device, a false pulse is not given, since it triggers 5, 6 after the element 21 triggers and the third pulse has lagged behind. Thus, the device operates according to the principle “the second of the three, i.e. the device

generates an output pulse after the arrival of the input pulses of two channels and resets the triggers for storing and analyzing the third channel after the arrival of a "lagged pulse."

The device works as follows.

The initial state of the triggers 4-8 in each of the channels 1-3 is zero. When the input asynchronous information is received at the inputs 27 of each of the channels 1-3, the trigger 4 of the record is set to one. The clock signal source 23