SU506865A1 - Device for determining the extremal value of a one-time process - Google Patents

Description

one

The invention relates to computer technology and can be applied for digital measurement of the extra-small value of a continuous, one-time process and its occurrence in situations of noisy noise and at a blurred extremum of a function.

The known devices of similar purpose contain memory registers, the zero-organ inputs of which are connected respectively to the input of the device and the output of the converter code-analogue, connected by an input to the discharge outputs of the reversible counter, the addition, subtraction inputs of which are connected to the output "Add up the zero-organ and the first input of the first element" AND, with the output "subtract the zero-organ and the first input of the second element" AND, with the output of the element "OR, whose inputs are connected to the output 1M of the first two x elements "And, the second inputs of which are connected to the first output of the clock, the second output of which is connected to the time counter. However, the known devices are characterized by a low accuracy of determining the time of occurrence of the extremum value of the function under the conditions of noise and during the measurement of the E1K1ST repair system.

The aim of the invention is to improve the accuracy of the device. This is achieved there.

that the device described additionally contains the elements “And, delays and triggers, and the single and zero inputs of the first trigger through the delay elements connect to the output of the first and the input of the third elements“ And to the output of the second and input of the fourth elements “And, the corresponding outputs of the first trigger of the node , keys to the second inputs of the third and

the fourth And elements, the third inputs of which are connected to the single output of the second trigger, the zero input of which is connected to the output of the fourth And element and the control input of the first memory register, the inputs

which are combined with the corresponding outputs of the time counter and the inputs of the second memory register, the control input of which is connected to the output of the third AND element and the control input of the third register

memory connected by other inputs to the corresponding outputs of the reversible counter.

FIG. Figure 1 shows the block diagram of the device being described (when the detectable extremum is the maximum); in fig. 2 is a time diagram of its operation (when determining the maximum of the function pai3MbiTO.ro, on which noise is imposed with a sweep not exceeding the quantization step on the level in the device).

The device contains a vul-organ 1, connected by the first input with input 2 of the device, output 3 "folded - with the element" And 4, peeeipcHiEHbiiM counter 5, output 6 "connected with zleme1NTO | M" And 7, generator 8 clock pulses, counter time 9, the element "OR 10, the delay elements 11 and 12, the triggers 13 and 14, the elements" AND 15 and 16, P1reo | b | razvovatel "ko-aialo 17, memory registers time extremum 18, 19 and 20 from iztadadam, with a lack of and extravaganza ana shch.

It is assumed that the zero-device of the device has an insensitivity zone that is also equal to the quasi-one step in the device, with its lower threshold equal to minus 0.5 quantization steps in the level, and the upper one equal to 0.5 steps. Null-orgi 1, generator 8 clockwise impulse, elements “And 7 and 4, reversible counter 5, element“ OR 10 and converter ”code - analogue 17 Form the next aial-Diffraction converter.

The investigated continuous single electrical process, on which noise is imposed with a sweep not exceeding the quantization step. At the level in the device, is fed to the input 2 of the zero-body 1, which is compared with the signal O | M from the output of the converter "analogue 17". If the difference these values are positive. and exceeds the 0.5 quantization step (top) threshold of the null-organ 1), then the output "add 3 last lol is the signal, allowing the clock to slip clock from the generator 8 clock pulses through the element" 4 and the element " OR 10 at the input of the reversible counter 5. When the pulses are counted in, the code of the reversible counter 5 increases, and the counterbalance signal from the output of the converter, the code - analog 17, which is controlled from the reversing counter 5, also incrementally increases until. while the difference of the input signal la and uravnoveshn vayuschego not become less than 0.5 quantization step on the level. This is the passage of the clock pulses to the output of the element “And 4 pre: k1 grows, since the sipnal on the one of the outputs of the zero-organ 1 is absent. When the input signal decreases, the operation of the following converter occurs in a similar way, but the reversible counter 5 and the element “AND 4 are controlled by the signal arising from the output | 5” and subtract the zero-body 1, which leads to a decrease in the code of the reversible counter 5 and balancing his signal.

Thus, the elements: null-organ 1, generator 8 clock pulses, elements. "And 7 and 4, element" OR 10, reversible counter | K 5 and transform "analogue code 17 implement the usual algorithm of the following analog-digital converter . The remaining elements of the device serve directly to isolate and register the E1 impedance and its appearance time.

Before the start of the process, the measurement of the count-mc time -9 and reversible schcc 5 is set to zero, the trigger 13 is set to "one, and the trigger 14 is set to" one if the function under study is convex with a maximum, and in the zero position, if the function under study is concave with a minimum. In the beginning of the process, a generator of 8 clock pulses is turned on and outputs signals to elements "And 7 and 4, as well as time stamps on time counter 9.

Suppose that by time point o (am. FIG. 2) in reversible counter 5 is registered (CODE N-2. At time ti (on the next conversion cycle) the difference between the function under study and the counterbalancing signal exceeds the upper threshold of operation fpl.- organ 1, and at its output 3 "add up a signal appears that permits the passage of a clock pulse through the element" AND 4 and the element "OR 10 at

the input of the reversible counter 5, so that the code of the latter is increased by one and becomes equal to L-1. Through fret the signal from the output of the element "And 4, having passed the element with a delay of 11, overturns the trigger 14 to the position" unit. At the time of maturing, and t-difference between the function under study and the balancing signal will again be positive and greater than 0.5 quantization step by level. At output 3, "fold the null organ 1

A sitnal reappears allowing the clock pulse to pass through the AND 4 element and the OR 10 element to the input of the ravarsive counter 5, the code of which increases as a result to N. Position of the trigger

14 does not change, and at the second input of the element "AND 16 there remains a permitting signal from the output of the" trigger unit 14, due to which the tact | YOU pulse passes to the output of the element "And 16 and to the inputs" recording

registers 20 and 19, respectively, of ekst | re.ma.chHOipo value and in | its mode for a fault with 1, in the first of which the code is fixed (reversible counter 5 immediately after time point fef-V). and in the second, the time code of counter 9, corresponding to this moment. Further, in the mod: t: t of time ts, due to the influence of the slips, the difference between the function under study and the counterbalancing signal becomes negative and greater (by modulus) 0.5 quantization steps. The code of the reversible counter 5 becomes jV-1, a clock pulse passes to the output of the element "And 7" and through the element of delay 12 overturns

the trigger 14 is set to zero, but the output of the element “AND 15 clock pulse from the output of the element“ And 7 does not pass, since the output “zero three / gage 14 at the moment of action of the pulse does not allow s; ignal. At time t, the reverse code

the counter 5 B1 becomes equal to .V again, and the trigger 14 returns to the “one” position, therefore, when at the time B1, tr ,, null-oipraiH 1 again detects the inequality “greater,” clockwise Imlluts through the “And 4 to 16” inputs to the “Record” inputs registers 19 and 20. At the same time, the maxi mumum code L + 1 is registered in nepiBOiM of them, and in the second, the time code of counter 9, which corresponds to this moment.

On the basis of control pulses at output 6 "subtract" ul-organ 1 at times t, U, t, and ta, as well as output 3 "add up at times fi, U, tn and tis does not lead to 1E1N : The states of registers 15 and 20, since the clock pulses do not pass to the output of the element "AND 16 because the comparison result recorded by trigger 14 at the previous inequality, is opposite to the 20 result at each of these moments, derived from this comparison. Finally, at time tiz, the clock pulse through the element “AND 4 passes to the output of the element“ AND 15, since with the previous inequality of the input and balancing signals at time ii4, trigger 14 was tilted to the position “zero and its output“ zero at time ti5 there is a placing level. The indicated clock pulse rate records in register 18 the time code for the occurrence of an extremum with excess and overturns the trigger 13 to the “zero” position. The permissive signal at its output is removed, and the elements 15 and 16 are locked, and the process 35 for determining the extreme value and the time of its occurrence ends there. To rearrange the device to determine the minimum of the function under study, it is necessary to swap the connection of the first 40 inputs of the elements “And 4 and 7 to the outputs” to add and “subtract the zero-body 1. When processing the measurement information. For example, on a computer, the specified value of the time of occurrence of an extremum can be calculated as the average arithh, 6

The metric of the registered time values with an excess and a shortage, or depending on the type of function under investigation, one of these values is taken as the desired one.

 the invention

A device for determining the extreme value of a one-time process, which contains memory registers, a null organ whose inputs are connected respectively to the device input and the output of a code-analog converter connected by an input to the discharge outputs of a reversible counter, whose addition, subtraction and clock inputs are connected respectively, with the output “add up the zero-organ and the first input of the first element“ AND, with the output “subtract the zero-organ and the first input of the second element“ AND, with the output of the element “OR, whose inputs connected to the outputs of the two first And elements, the second inputs of which are connected to the first output of the clock generator, the second output of which is connected to a time counter, which is additionally equipped with the elements And, delays and triggers The single and zero inputs of the first trigger are connected via the delay elements respectively to the output of the first, to the input of the third elements “And and to the output of the second, Input to the fourth elements“ And, the corresponding outputs of the first trigger to the second inputs of the third and fourth "And" elements, the third inputs of which are connected to the single output of the second trigger, the zero input of which is connected to the output of the fourth element of the "AND and INPUT] control of the first register, the inputs of which are connected to the corresponding outputs of the time counter and the inputs of the second register memory, the control input of which is connected to the output of the third AND element and the control input of the third memory register connected by other inputs to the reversible outputs of the corresponding counter.