SU481938A1 - Memory device - Google Patents

Description

one

The invention relates to computing, in particular, to storage devices.

A memory device (RAM) is known, which contains a drive on numerical ferrite lines with recording and interrogation holes stitched according to readout, prohibit and interrogation bits, and each interrogation bus is stitched through the interrogation aperture in the forward direction; each address separately, address and discharge current drivers, and read-out power terminals connected to respectively; windings, and selective diodes.

The purpose of the invention is to expand the functionality of the device.

For implementation, the device contains junior address drivers, the first and second operand drivers, which are connected respectively to the beginning of the first and second operand buses; tapped shia; polling is stitched by additional polisher1 but through recording holes in the opposite direction at each address separately; tire start j

polling through selection diodes, connected. with the corresponding shaper of the younger bit of the address, and the ends of the interrogation buses are connected to the shaper of the older bit of the address; The tires of the first and second operands are stitched, respectively, through the recording holes and the polling holes of all NUMBERS.X ferrite lines at each address in the section, and the ends of these buses are connected through the selection diodes. With the corresponding shaper of the younger address bit.

I The drawing shows a memory j device with a capacity of three ft-bit words.

The shapers of the lower order bit 1 are connected via selection diodes 2 to the beginnings of the bus 3 of the survey. Tires 4 polling iropushi through the holes 5 onrosa and opposite through the holes 6 records of the perforated ferritic ruler 7, with the ends of the uiHH 8 polling united; are not grouped and attached. By the formation of 9 older bits and / uresgch. Tires 1C) of the first operand are stitched ;1 ;; res) Pts Bopci-iiM i, As an example, I considered / implemented the memory of a conjunction operation, with the signal on the bus taken as D., and its absence as O. a. Let, in the microtack t, i 0, Under these conditions (concurrent), the area of ferromagnetic material around the recording hole will be reversal counterclockwise. In the next micro-tact t- + 1 I 1i, as a result of the def. reservations which area around the survey hole will also be reversal counterclockwise p signal emf 1. there will be no readout on the read bus, i.e., -Lb. At t; when awesome The current flows oi of the current pulse of any operand and of the prohibiting discharge current are mutually compensated for in the next micro-cycle t; signal emf on the bus (I2. 0). readout will not c. At 1, the magnetic fluxes from the bit; about the inhibit current and one operand interconnect, and the current pulse of the other operand (say, the first) creates a magnetic flux that remagnetizes the portion of the core of the recording hole in the direction of the hour hand. In the next micro tact; 1.4-1 7 1 magnetic peremagnit the area around the survey hole in a counterclockwise direction. As a result of this, on Wits si I, -I- M on the bus reading emf. on the spike win 1x.Ies11 1l p In this way, the supports of XY will be executed. The subject matter of the invention is a memory device containing a data storage device on numerical ferrite plates with recording and interrogation holes, stitched respectively, with read tires, a ban current and interrogation current, each bus of the heading through the interrogation in the forward direction for each address separately, address and discharge current drivers and read amplifiers connected to the respective windings, and selection diodes, characterized in that, in order to expand the functional possibilities, it contains t formirova gels least significant bit address generator MSB address and conditioners of the first and second operands respectively to the beginnings pod1i1yucheinye tires of the first and second operands; Each polling bus npoiuuTa additionally through the recording holes in the opposite direction at each address and separately, the polling bus starts through the selection diodes are connected to the corresponding j and e-mail address bits, and the ends of the polling buses are connected to the former shaper addresses; The first and second operands of the first and second operands are stitched, respectively, through отв x записи records and the polling holes of all numerical ferrite bars at each address separately, and the ends of these buses are connected to the appropriate form of the second or second address through the selection diodes. and