SU474025A1 - Apparatus for calculating the logarithm of the amplitude ratio of two pulses - Google Patents

Description

decisive passage of the counting pulses into the digital-analog converter 5 and the reversible counter 6, connected to the counting inputs of the latter. The output of the digital-to-analog converter 5 is connected to the second input of the comparison circuit 2, forming the following system. The reversible counter 6 is designed to sum the 1 and successively following counting pulses, the number of which is equivalent to the maximum amplitude value of the first logarithmic impulse and further subtraction of the successively following counting pulses, the amount equivalent to the maximum of the amplitude value of the second logarithmic pulse. The inputs controlling the summation, subtraction and reset of the reversible counter 6 are connected to the corresponding outputs by the operating mode switching unit 7: a) switching on the reversing counter, 6 to the summing or subtracting modes if each nerve or each second impulse is present at the device input from a pair of measurable; b) generating a “reset to digital-to-analog converter 5 pause after each input pulse and generating a“ reset to reversible counter 6 signal to a pause preceding the measurement of each next runner signal to prepare digital-to-analog converter 5 to convert the amplitude logarithm of each subsequent pulse and to prepare a reversible counter 6 to calculate the difference of the logarithms of the amplitudes of each next pulse bursts. To this end, the operating mode switching unit 7 contains two comparison circuits forming control signals with f K -lgt / Bx and Igf / Bx o, triggers, schemes AND, OR, NOT, interconnected appropriately, and three the input unit 7 is connected to the outputs of the digital-to-analog converter 5, the logarithmic amplifier 1 and the control unit 4. The output of the reversible counter 6 is connected to the input of the zero-fixing unit 8, which is a decoder with the output "O" and connected to the output of the operating-switching unit 7 . The zero fixing unit is intended for switching through reversing counter 6 from subtraction mode to summing mode when passing it through zero, which can occur when subtracting tii-p at Reversing counter output 6 connected to the information input of resolution result permitting unit 9, controlling the inputs of which are connected to the outputs of the comparison circuit 2, the operating mode switching unit 7 and the control unit 4. One input of the control unit 4 is connected to the start device input, and the second input is connected to the output of the switching unit modes of operation, fixing a pause between input measured pulses, which allows the device to start the device to turn on

only in the absence of measured pulses at the input.

The device works as follows. With the signal "triggering on the output of the control unit 4 in the pause between the input measured pulses, a signal will be generated which prepared the device for the beginning of the calculation. When a measured pulse is detected at the input of the logarithmic amplifier I, a comparison circuit 2 (lgbnx b ;;) is triggered and, through a coincidence circuit 3, the counting pulses 6 are fed to the inputs of the digital-analog converter 5 and the reversing counter 6, as a result from which the output of the digital-to-analog converter 5 generates a value proportional to the number of pulses stored in the reversing counter 6. At the moment of passing through a maximum and

further decrease (Vv.kh to zero does not cause a change in t / k, since with the signal from the output of the comparison circuit 2 is absent and the coincidence circuit 3 will be closed for the passage of counting pulses. At (/ in 0

By block 7 and switching modes of operation, the digital-to-analog converter 5 will be switched to the zero state, and the reversible counter 6, the stored number E will be switched to the "subtracting" mode. When the next pulse appears, the process of converting it to an equivalent number of counting pulses nz occurs similarly with simultaneous subtraction of til-2 in a reversible counter 6. In case (the device was included in the scrolls preceding the smaller amplitude from the input impulses), then the process of subtracting the passage of the reversible counter 6 through the "O through the signal from the zero-fixing unit 8", switches the reversing counter 6 through the operating-mode switching unit 7 to the "summing" mode. When t / nx passes through the maximum, the calculation process ends and (through reading resolution block 9, the difference HI - 2 will be read, the proportional logarithm of the ratio of the two pulses. In the pause between the second and third pulses, the setting “On digital-analog converter 5, reversible count 6 and the preparation of all nodes of the device to a similar calculation of the logarithm of the amplitude ratio of the next pair of pulses.

Subject invention

A device for calculating the logarithm of the amplitude ratio of two pulses, comprising a logarithmic amplifier whose input is connected to the device input and the output to the first input of the comparison circuit and the first input of the mode switching unit, the second input of the comparison circuit is connected to the output of the D / A converter, and the output through the circuit "AND - with the first input of the digital-analog converter and the input" the addition of a reversible counter, the output of which through the read resolution block is connected to the output of the device, and the control unit, lichayuschees in that, in order to increase the accuracy of calculation, the second input of the comparison circuit is connected to the second input of the digital-to-analog converter through the switching unit modes, one of whose outputs is connected to the input of "down counter subtraction connected yield

through the additionally introduced fixing unit zero to the third input of the mode switching unit, its third output is connected to the second input of the read resolution block,

connected by the third input to the output of the comparison circuit, and the fourth output to the control unit whose output is connected to the fourth inputs of the read resolution block and the mode switching unit, and to the second input of the I circuit, to the third input of which the clock input of the device is connected.