SU437084A1 - Input device and output for time-pulse computing devices - Google Patents

Description

one

The invention is intended to linearly convert a DC voltage into a time interval and a time interval into a voltage. It can be used during time-of-pulse computing devices (TIVU).

A device is known comprising two integrators, a null organ, a comparison unit, keys, triggers, and OR logic elements. Moreover, the first and second integrator drives through the first and second switches are respectively connected to the source of the reference voltage, and the input of the second integrator is connected to the input source via the third switch.

However, this device is characterized by the dependence of the result on the instability of the reference time interval, i.e., on the duration of the first integration cycle.

The proposed device is characterized in that in order to increase its accuracy and simplify in it the inputs of the comparator unit are connected to the output of the first integrator and the source of the reference voltage, and the output of the comparator unit is connected through the first logical element OR to the zero input of the first trigger, whose single output is connected to the control inputs of the first and third keys, the input of the bullet-organ is connected to the output of the second and integrator, and the output of the zero-organ is connected to the zero input of the second trigger, the single output of which is connected to the control l yuschim input of the second key.

FIG. 1 shows a functional diagram of the proposed device; in fig. 2 is a voltage chart, where / i-4 are time instants.

The proposed device contains the first and second integrators 1 and 2, block 3 comparisons, null organ 4, keys 5-8, triggers 9-12, logic elements OR 13-15.

The input-output device is connected with time-computing devices (TIVU) by means of electrical circuits, which receive control commands and the converted time interval in the form of short voltage pulses, which translates the result of converting the input voltage into a time interval in the form of a voltage pulse of the corresponding duration .

With such an I / O device circuit design, a positive effect is achieved due to the fact that the first integrator 1 and the first key 5 are used to form the reference time interval when

input information, and to convert the time interval into a voltage when outputting it. As a result, the mutual compensation of errors due to the dependence of the reference time interval and

scale factor of the first integrator from its parameters. This reduces the error of the TLIB as a whole and simplifies it, since there is no need for separate compensation of the reference time interval and the scale factor of the integrator. The operation of an input / output device consists of two cycles. The first cycle - the conversion of the input voltage / 7vh into the time interval Tvx by the push-pull (compensatory) integration - takes the time interval bounded by the moments / i and 4 (see Fig. 2). In this cycle, key 5, integrator 1 and comparison unit 3 form the reference time interval, To, and keys 6, 7, integrator 2 and nullorgan 4, form time and t) p1vl TBHDo moment i and triggers 9-12 , keys o-8 are open. At the moment 1 the installation of the integrators 1, 2 begins on the "O. For this, a command impulse is added from the TIDV (see Figs. 1 and 2). The trigger 11 is set by this pulse to the CO-station "1" and generates a signal of the setting and "tegrators 1, 2 to" O. At time 4, a command impulse is sent from the TIRI through the logic elements OR 14, 15, turning the trigger 11 into the "O" state, this completes the installation of the integrators 1, 2 to "O" and starts the first integration cycle. At the same time, the trigger 9, turned over to the state "1, sets the keys 5, 7 to the closed state. Key b connects the input of the integrator 1 to the source of the reference to: the chips But- From this point on, the output voltage V}, (t) of the integrator 1 varies linearly 35. At time 3, the linearly varying voltage across the modulus becomes equal to the voltage But supplied to the comparison unit 3. The latter is triggered, the signal generated by it, through the logic element OR 13, flips the trigger 9, and the keys 5, 7 open. The time interval T - / - J o - t a - ,, AI where / Ci is the scale factor of the integrator 1, is the reference and determines the duration of the first integration cycle. Since during the interval That key 7 was closed and the input of the integrator 2 was connected to the input voltage source C / in, at the end of the first cycle at time 4, the voltage U, (t,), where KZ - the scale factor of integrator 2. At time 4, the second integration cycle begins. A command impulse is given from the TIBW, which reverses the trigger 10 to the state 65 45 "1, and the latter translates the key b into the closed state. At the same time, the input and tegratora 2 is connected to the source of the reference voltage UQ, the sign of which is opposite to the sign t / Bx. Starting from the moment / 4. the voltage at the output of the integrator 2 decreases linearly. At the time U, the line-varying voltage (t) passes through zero and the zero-organ 4 is triggered. The zero-organ signal 4 overturns the trigger 10 to the state "O", and the key 6 opens. Tvh time interval; RY is the result of converting the voltage f / Bx to the interval "output from trigger output 10 to WIVU. The trigger 10 is in the state "1 during the time interval. The second cycle — converting your time interval into output voltage f / output — takes ne, a time period limited by U and 4 moments. In this cycle, the key 5" integrator 1 forms the output voltage. At the moment / 6, the installation of the integrator 1 starts at "O." For this, a command impulse is sent from the TIDB (see Fig. 1.2), which flips the trigger 11 into the state "1. At time 7, a command impulse is sent out from the TIDV through the logic elements OR 14, 15, which flips the triggers 9, P. This completes the installation operation of the zero of the integrator 1, and the trigger 9 puts the key 5 into the closed state. At time / 8, from the TLIB, a command pulse is sent through the logical element OR 13, returning the trigger 9 to the "O" state, and the key 5 is opened. Thus, the key 5 connects the input of the integrator 1 to the source of the reference voltage t / o for a time At the time / 8 "and the output of the integrator 1 is recorded the result of the voltage conversion voltage - and (4). Thus, during the first cycle, the input voltage t / in is linearly transformed into a time interval. TxHInterval Tvx is processed in. As a result of processing, a time interval of Tvyh is formed. associated with Tvx linear dependence. Then, during the second cycle, Thyx interval is linearly converted to output voltage 1 / output. The output voltage of TIDV with the proposed input / output device does not depend on the reference time interval To and the integrator scale factor / Ci. The command pulse at time t% sets the trigger 12 to the state "1, the key 8 is opened, and the voltage {Uvih is fed to the output of the device. With the start of the conversion cycle, the command impulses ti or and return the trigger 15 to the state "O", and the key 8 is closed.

Subject invention

An input and output device for time-simulator computing devices containing two integrators, a null organ, a comparison unit, keys, triggers, and OR logic elements, respectively, connects the nerve and second integrator inputs through the nerve and second keys, and the input is the second integra6

The torus is connected via a third key to an input voltage source, characterized in that, in order to increase the accuracy and device flattening, in it the inputs of the reference unit are connected to the output of the first integrator and the source of the reference AP, and the output of the comparison unit is connected via the first logic element OR with zero input of the first trigger, the unit output of which is connected to the control inputs of the first and third keys; the input of the zero-organ is connected to the output of the second integrator, and the output of the ulorgan is connected to the zero input of the second trigger, the single output of which is connected to the controlling and input of the second key.

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