SU430728A1 - Comparison Device - Google Patents

Description

The invention can be used in digital measuring devices, analog-digital converters, specialized computing devices, as well as automatic voltage control devices. According to the main author. St. No. 314308, a comparison device with a pulse interrogation is known, containing a series-connected balanced cascade on transistors with a switch included in the Emitter circuit, the input of which through a pulse transformer is connected to the interrogation pulse generator, unbalance amplifier and output cascade whose operating current is switched by a transistor switch between the input of the latter and the pulse generator of the olros included a time delay element and a driver of short gating pulses. However, the known device has significant temperature and time D) zero rails, due to the instability of the emitter-base transition voltage of the imbalance amplifier transistor, and low response time limited by transients occurring in the input stages when switching the interrogation circuit and requiring to eliminate a false triggering ciipo time of an impulse pulse inside the interrogation pulse for the duration of their decay. The aim of the invention is to reduce the zero drift and increase the speed of the device. This is achieved by introducing an unbalance amplifier and an output differentiating cascade into the proposed switch device, with the input balance stage and the unbalance amplifier locking transistors in the collector circuits of T1 transistors, and the input of the switch of the output differentiating cascade, in the collector -cells x of transistors which include diodes connected to the output of a transistor switch controlled by the signals of the interrogation pulse generator, to the output of the latter via a pulse t A ranformator is connected to the input of the booster amplifier unbalance. The drawing shows the basic scheme of the proposed comparison device. The device consists of a balanced cascade 1 pa transistors, in the collector circuit of which transistors 2 and 3 are connected in the diode switching on, in the emitter circuit - switch 4, and the bases are inputs 5 and 6; amplifier 7 imbalance, in the collector circuit of which T | ranzistor S and 9 are included in the diode inclusion, and in the emitter circuit -

switch 10 amplifier unbalance, input 11 connected to the output of the pulse transformer 12; transistor switch 13; output differentiating cascade 14 on transistors G5 and 16, the emitter circuit of which includes an output differentiating switch | of the cascade 17, and tunnel diodes 18 and 19 from which the output signal is removed from the collector circuits - direct from output 20 and inverse from output 21 ; generator of 22 polling pulses; the element 23 of the time delay, the driver 24 with 11 rotating pulses; i25 and 26 reference zener diodes, the bias-feeding voltage levels.

Device C (Equality works as follows.

In the initial state, all the device transistors are locked, and the current through the tunnel diodes 18 and 19 does not pass. When a polling pulse arrives from the generator 22 through the pulse transformer 12 to the input 11, the switches 4 and 10 begin to generate currents, respectively, into the emitter circuits of the balanced cascade 1 and the amplifier 7 1 unbalance. In this case, the current generated in the emitter circuit of the balanced cascade 1 is redistributed between its collectors in accordance with the potentials of the inputs 5 and 6, to which the equalized signals are applied. Distributed current, the passage through the transistors 2 and 3, generates currents that cause the corresponding redistribution of the emitter current from the switch 10 unbalance amplifier between the collectors of the unbalance amplifier 7. The collector currents of the imbalance amplifier, pass through the transistors 8 and 9, form the control currents of the basic circuits of the output differential stage 14.

The transistor switch 13 is opened for a short period of time, much shorter than the polling pulse duration, with a gating pulse shifted by means of the time delay element 23 into the interrogation pulse and generated

shaper 24. Therefore, a constant current from the switch of differentiating cascade 17 is generated in the common emitter circuit of transistors 15 and 16 of the output differentiating cascade 14 only for a short period of time equal to the duration of the gating pulse. The current from the switchboard of the differentiating cascade is redistributed between the collectors of transistors 15 and 16 in proportion to the amplified error current supplied to its bases.

When the collector current, for example, transistor 16, reaches the peak current value of the tunnel diode 19, the latter switches to the diffusion branch of the current-voltage characteristic, forming the leading edge of the output pulse, which is removed from output 20.

At the time of the decay of the gating pulse, the transistors 15 and 16 are closed, and the tunnel diode 19 abruptly switches to the tunnel portion of the current-voltage characteristic, forming the rear edge of the output pulse.

Subject invention

Device Comparison auth. St. No. 314308, characterized in that, in order to reduce the zero drift and increase the speed of operation of the device, an unbalance amplifier switch and an output differentiating cascade are introduced into it, and the input of the switch of the output differentiating cascade, in the collector circuits of the transistors of which the tunnel diodes are connected, is connected to the output of the transistor switch controlled by the generator signals and interrogation pulses to the output of which is connected through a pulse transformer switch input of amplifier imbalance.