SU430432A1 - - Google Patents

Description

(54) DIGITAL COMPUTING MACHINE SIMULATOR

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The invention relates to teaching aids and can be used in the study of the structures and algorithms of various digital computer devices. For this, the simulator is connected to the output of a digital computer that simulates the functioning algorithms of the device under study.

Known simulators DVM containing serially connected register and decoder code address row, the input information register.

However, such simulators have a complex structure and low speed.

A matrix of LEDs is introduced into the proposed simulator, covered with a replaceable mask with holes for the LEDs and with the functional diagram of the device under study. The horizontal buses of the matrix are connected to the outputs of the code address address code decoder, and the vertical ones are connected to the outputs of the input information register.

This simplifies the device and improves its speed.

The drawing shows a structural diagram of the proposed simulator, where indicated: 1-register of input information; 2 is the row address code register, 3 is the row address code decoder, and 4 is the LED array.

For each algorithm of the device under study, a special program is compiled, which, together with the initial data, is entered into the memory block of the simulating digital computer. The DVR performs the specified program for the operations and outputs to the simulator all the necessary intermediate and final results of the calculations, which are displayed sequentially by means of the LEDs. The computation results from the DVR are input to the device.

The operation of the device is as follows.

The input information from the output of the digital computer is fed to the input of register 1 and is stored in it at the time of display. At the same time, the line address code is supplied from the digital computer, which is also stored by register 2 for the time of displaying the input information. The decoder 3 decodes the received code, as a result of which a signal appears at one of its outputs. The outputs of the decoder are connected to horizontal buses of the matrix of 4 LEDs, therefore one of the rows of LEDs of the matrix turns out to be half-selected.

The outputs of the trigger 1 register are connected to the vertical matrix pins, as a result of which the LEDs connected to the vertical matrix buses turn out

semi-elected if the bus receives an enable signal from register trigger 1.

Thus, the LEDs of the selected line are affected by the total frequency of the e from register 1 and the decoder 3. As a result, the LEDs of this line light up in accordance with the input information. The LEDs of the remaining rows may be affected by one of the signals, so they do not light up.

When the next input information is received, the processes are repeated. Periodic admission to the simulator of the same information (25-30 times per second) creates a stable picture of luminous diodes.

An opaque mask with a functional diagram is superimposed on a matrix of LEDs to study a specific DVR device.

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the device under study

To switch to the study of another device, it is enough to replace the mask and turn on the appropriate modeling program.

Subject invention

A digital computer simulator that contains serially connected registers and a decoder for the line code and a register for the input information;; with a mixed mask, the horizontal part of which is connected to the outputs of the code of the address line address, and vertically - to the outputs of the register in: 0/1;

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